AX500-1BG896 ACTEL [Actel Corporation], AX500-1BG896 Datasheet - Page 27

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AX500-1BG896

Manufacturer Part Number
AX500-1BG896
Description
Axcelerator Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
For example, if LVTTL 3.3V (V
other available (i.e. compatible) I/O standards in the
same bank are LVTTL 3.3V PCI/PCI-X, GTL+, and LVPECL.
Table 2-13 • Legal I/O Usage Matrix
I/O Standard
LVTTL 3.3V (V
LVTTL 3.3V(V
LVCMOS 2.5V (V
LVCMOS 2.5V (V
LVCMOS1.8V
LVCMOS1.5V (V
3.3V PCI/PCI-X (V
3.3V PCI/PCI-X (V
GTL + (3.3V)
GTL + (2.5V)
HSTL Class I
SSTL2 Class I & II
SSTL3 Class I & II
LVDS (V
LVDS (V
LVPECL (V
LVPECL (V
Notes:
1. Note that GTL+ 2.5V is not supported across the full military temperature range.
2. A "✓" indicates whether standards can be used within a bank at the same time.
Examples:
a) LVTTL can be used with 3.3V PCI and GTL+ (3.3V), when V
b) LVTTL can be used with 3.3V PCI and SSTL3 Class I and II, when V
REF
REF
REF
REF
=1.0V)
=1.25V)
=1.0V)
=1.5V)
REF
REF
=1.5V)
REF
=1.0V)
REF
REF
REF
REF
=1.75V) (JESD8-11)
=1.0V)
=1.25V)
=1.0V)
=1.5V)
REF
= 1.0V) is used, then the
REF
v2.7
= 1.0V (GTL+ requirement).
Also note that when multiple I/O standards are used
within a bank, the voltage tolerance will be limited to
the minimum tolerance of all I/O standards used in the
bank.
REF
= 1.5V (SSTL3 requirement).
Axcelerator Family FPGAs
2-13

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