DEMO9S08LC60 Freescale Semiconductor, DEMO9S08LC60 Datasheet - Page 158

BOARD DEMO FOR 9S08LC60

DEMO9S08LC60

Manufacturer Part Number
DEMO9S08LC60
Description
BOARD DEMO FOR 9S08LC60
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheets

Specifications of DEMO9S08LC60

Contents
Evaluation Board
Processor To Be Evaluated
MC9S08LC60
Interface Type
RS-232, USB
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08LC
Rohs Compliant
Yes
For Use With/related Products
MC9S08LC60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 9 Liquid Crystal Display Driver (S08LCDV1)
9.5.2.1
Example 1 LCD setup requirements are reiterated in the following table:
Table 9-22
158
LCDSUPPLY
FPENR[5:0]
XXXXXX00
0XXXXXXX
10XXXX10
LCDCLKS
0X100X00
00000000
LCDBCTL
Example
Register
LCDCR1
LCDCR0
1
lists the required setup values required to initialize the LCD as specified by Example 1:
Operating
Voltage,
Initialization
VSUPPLY[1:0]
CPCADJ[1:0]
CLKADJ[5:0]
1.8-V
BRATE[2:0]
LCDCPMS
BLKMODE
LCDCPEN
HDRVBUF
V
DUTY[1:0]
BBYPASS
LCDSTP3
LCLK[2:0]
SOURCE
LPWAVE
FPENR0
FPENR1
FPENR2
FPENR3
FPENR4
FPENR5
LCDWAI
LCDIEN
bit field
DD
DIV16
bit or
LCD Clock
32.768 kHz
External
Source
Table 9-22. Initialization Register Values for Example 1
XXXXXXX0
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
11111111
11111111
11111111
11111111
00000000
000000
Binary
Value
XXX
100
Example 1
XX
10
11
X
X
X
X
X
0
0
1
0
0
0
LCD Glass
Operating
Voltage
3-V
Selects the external clock reference as the LCD clock input
External clock reference = 0; Bus clock = 1
Adjusts the LCD clock input (see table 9-12)
Adjusts the LCD clock input (see table 9-12)
Enable the charge pump
For 3-V LCD glass, select doubler mode; Doubler mode = 0; Tripler mode = 1
High drive buffer
Configure LCD charge pump clock source
Buffer Bypass; Buffer mode = 0; Unbuffered mode = 1
When VSUPPLY[1:0] = 10, the LCD must be externally powered via V
table 9-16). For 3-V glass, the nominal value of V
LCD Interrupt Enable
LCD is “on” in WAIT mode
LCD is “on” in STOP3 mode
For 1/4 duty cycle, select closest value to the desired 30 Hz LCD frame frequency
(see table 9-13)
Low power waveform
For 128 segments (4x32), select 1/4 duty cycle (see table 9-11)
N/A; Blink Segments = 0; Blink All = 1
N/A
Only 32 Frontplanes need to be enabled.
segments
Required
LCD
128
Frame
30 Hz
Rate
LCD
Mode/Rate
No Blinking
Comment
Blinking
LCD
WAIT modes
Behavior in
STOP3 and
STOP3: on
should be 1.5-V.
WAIT: on
Freescale Semiconductor
LCD Power
Power via
LCD
Input
V
LCD
(see

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