DEMO9S08LC60 Freescale Semiconductor, DEMO9S08LC60 Datasheet - Page 19

• Manufacturer Part Number: DEMO9S08LC60
• Description: BOARD DEMO FOR 9S08LC60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08LC60

• Contents: Evaluation Board
• Processor To Be Evaluated: MC9S08LC60
• Interface Type: RS-232, USB
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08LC
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08LC60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section Number
16.1 Introduction ...................................................................................................................................293
16.2 External Signal Description ..........................................................................................................297
16.3 Register Definition ........................................................................................................................297
16.4 Functional Description ..................................................................................................................299
17.1 Introduction ...................................................................................................................................301
17.2 Background Debug Controller (BDC) ..........................................................................................302
17.3 On-Chip Debug System (DBG) ....................................................................................................310
Freescale Semiconductor
15.6.1
15.6.2
16.1.1
16.1.2
16.1.3
16.1.4
16.1.5
16.3.1
17.1.1
17.2.1
17.2.2
17.2.3
17.2.4
17.3.1
17.3.2
17.3.3
17.3.4
17.3.5
17.3.6
External Pins and Routing ............................................................................................288
15.6.1.1 Analog Supply Pins ......................................................................................288
15.6.1.2 Analog Reference Pins ..................................................................................289
15.6.1.3 Analog Input Pins .........................................................................................289
Sources of Error ............................................................................................................290
15.6.2.1 Sampling Error ..............................................................................................290
15.6.2.2 Pin Leakage Error .........................................................................................290
15.6.2.3 Noise-Induced Errors ....................................................................................290
15.6.2.4 Code Width and Quantization Error .............................................................291
15.6.2.5 Linearity Errors .............................................................................................291
15.6.2.6 Code Jitter, Non-Monotonicity and Missing Codes ......................................292
ACMP/TPM1 Configuration Information ....................................................................293
AMCPO Availability ....................................................................................................293
Features .........................................................................................................................295
Modes of Operation ......................................................................................................295
16.1.4.1 ACMP in Wait Mode ....................................................................................295
16.1.4.2 ACMP in Stop Modes ...................................................................................295
16.1.4.3 ACMP in Active Background Mode .............................................................295
Block Diagram ..............................................................................................................295
ACMP Status and Control Register (ACMPSC) ..........................................................298
Features .........................................................................................................................301
BKGD Pin Description .................................................................................................302
Communication Details ................................................................................................303
BDC Commands ...........................................................................................................307
BDC Hardware Breakpoint ..........................................................................................309
Comparators A and B ...................................................................................................310
Bus Capture Information and FIFO Operation .............................................................310
Change-of-Flow Information ........................................................................................311
Tag vs. Force Breakpoints and Triggers .......................................................................311
Trigger Modes ..............................................................................................................312
Hardware Breakpoints ..................................................................................................314
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Analog Comparator (S08ACMPV2)
Development Support
Chapter 16
Chapter 17
Title
Page
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