M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 162

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
<R>
5.2
160
PLLSIN
CPU
DMA, interrupt controller
Timer (excluding watchdog timer)
Watchdog timer
UARTA
CSIB
A/D converters 0, 1
A/D converter 2
Remarks 1. f
Caution Because f
Remark f
X1
X2
Configuration
Oscillator
2. n = 0, 1
prescaler 2, if f
f
f
f
X
XX:
CPU:
CLK:
:
Function Block
XX
: Peripheral clock
Oscillation frequency
System clock frequency
CPU cock frequency
Internal system clock frequency
f
X
CPU
PLL
and f
X
= 8 MHz, f
Oscillation stabilization
time wait control (OST)
Table 5-1. Operation Clock of Each Function Block
CLK
SELPLL
STOP mode
stop control
Oscillator
bit
do not go through PLL immediately after reset, and f
IDLE mode
CHAPTER 5 CLOCK GENERATOR
CPU
control
IDLE
Figure 5-1. Clock Generator
and f
User’s Manual U16543EJ4V0UD
f
f
f
f
f
f
f
f
CPU
CLK
XX
XX
UCLK
CCLK
XX
XX
f
XX
/2
/1,024
/2
/4
(Selected from f
(Selected from f
(Selected from f
(Selected from f
CLK
Clock monitor
Prescaler 2
Prescaler 1
are 1 MHz.
Oscillation stabilization
time wait
f
XX
XX
f
f
f
XX
XX
XX
XX
XX
XX
f
/8
/4
/2
XX
to f
to f
to f
/2 to f
/4 to f
CK1, CK0
XX
XX
XX
bits
/4,096
/8 by PCC register)
/8 by PCC register)
XX
XX
/4,096 by UAnCTL1 register)
/256 by CBnCTL1 register)
Operation Clock
HALT mode
control
HALT
High impedance
output control
(timer for motor control)
Peripheral clock
Watchdog timer
clock
XX
/8 is selected by
f
f
CPU
CLK
CPU clock
Internal system
clock

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