M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 332

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
330
TQ0IOC2
(d) TMQ0 I/O control register 2 (TQ0IOC2)
(e) TMQ0 counter read buffer register (TQ0CNT)
(f) TMQ0 capture/compare registers 0 to 3 (TQ0CCR0 to TQ0CCR3)
The value of the 16-bit counter can be read by reading the TQ0CNT register.
If D
to the TQ0CCR3 register, the cycle and active level of the PWM waveform are as follows.
Remarks 1. TMQ0 I/O control register 1 (TQ0IOC1) and TMQ0 option register 0 (TQ0OPT0) are not
PWM waveform cycle = (D
TOQ01 pin PWM waveform active level width = D
TOQ02 pin PWM waveform active level width = D
TOQ03 pin PWM waveform active level width = D
0
0
is set to the TQ0CCR0 register, D
Figure 7-23. Setting of Registers in External Trigger Pulse Output Mode (3/3)
2. b = 1 to 3
used in the external trigger pulse output mode.
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
0
0
+ 1) × Count clock cycle
0
User’s Manual U16543EJ4V0UD
1
TQ0EES1
to the TQ0CCR1 register, D
0/1
TQ0EES0
1
2
3
0/1
× Count clock cycle
× Count clock cycle
× Count clock cycle
TQ0ETS1
0/1
TQ0ETS0
2
to the TQ0CCR2 register, and D
0/1
Select valid edge of external
trigger input (TRGQ0 pin)
Select valid edge of external
event count input (EVTQ0 pin)
3
,

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