M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 657

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Note Do not set the DFn bit to “1” by software.
Cautions 1. For the IFCn5 to IFCn0 bits, see Table 16-1 DMA Start Factors.
If the interrupt specified as the DMA transfer start factor occurs and it is necessary to clear the DMA
transfer request while DMA transfer is disabled (including when it is forcibly terminated by software), stop
the operation of the source causing the interrupt, and then write 0 to the DFn bit (for example, disable
reception in the case of serial reception). If it is clear that the interrupt will not occur until DMA transfer is
resumed next, it is not necessary to stop the operation of the source causing the interrupt.
2. Be sure to clear bit 6 to “0”. If it is set to 1, the operation is not guaranteed.
(n = 0 to 3)
DTFRn
After reset:
DFn
00H
DFn
<7>
0
1
CHAPTER 16 DMA FUNCTIONS (DMA CONTROLLER)
Note
R/W
DMA transfer not requested
DMA transfer requested
6
0
Address: DTFR0 FFFFF810H, DTFR1 FFFFF812H,
User’s Manual U16543EJ4V0UD
IFCn5
5
DTFR2 FFFFF814H, DTFR3 FFFFF816H
DMA transfer request status flag
IFCn4
4
IFCn3
3
IFCn2
2
IFCn1
1
IFCn0
0
655

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