M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 56

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
54
Note During saturated operation, the saturated operation results are determined by the contents of the OV
(5) CALLT execution status saving registers (CTPC, CTPSW)
CTPSW
CTPC
There are two CALLT execution status saving registers, CTPC and CTPSW.
When the CALLT instruction is executed, the contents of the program counter (PC) are saved to CTPC, and
the program status word (PSW) contents are saved to CTPSW.
The contents saved to CTPC consist of the address of the next instruction after the CALLT instruction.
The current PSW contents are saved to CTPSW.
Bits 31 to 26 of CTPC and bits 31 to 8 of CTPSW are reserved (fixed to 0) for future function expansion.
flag and S flag. The SAT flag is set (to 1) only when the OV flag is set (to 1) during saturated operation.
Maximum positive value exceeded
Maximum negative value exceeded
Positive (maximum value not exceeded)
Negative (maximum value not exceeded)
31
31
0
0
0
0
Operation result status
0 0 0 0
0 0 0 0
26 25
0
0
0 0 0 0
CHAPTER 3 CPU FUNCTION
User’s Manual U16543EJ4V0UD
0
0
1
1
Holds value
before operation
0 0 0 0
(PC contents saved)
SAT
0
0
1
1
0
0 0 0 0
Flag status
OV
8
(PSW contents saved)
7
0
1
0
1
S
0
0
7FFFFFFFH
80000000H
Actual operation
result
operation result
(x: Undefined)
(x: Undefined)
Saturated
000000xxH
0xxxxxxxH
After reset
After reset
(2/2)

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