M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 391

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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CHAPTER 8 16-BIT 2-PHASE ENCODER INPUT UP/DOWN COUNTER/GENERAL-PURPOSE TIMER (TIMER ENC1n)
(1) Timer ENC1n (TMENC1n)
Note V850E/IA4 only
TMENC1n is a general-purpose timer (in general-purpose mode) and 2-phase encoder input up/down counter
(in UDC mode).
This timer counts up in the general-purpose operation mode and counts up/down in the UDC mode.
It can be read or written in 16-bit units.
Reset sets TMENC1n to 0000H.
Cautions 1. Writing to TMENC1n is enabled only when the TMC1n.TM1CEn bit is 0 (count operation
TMENC1n start and stop is controlled by the TMC1n.TM1CEn bit.
The TMENC1n operation consists of the following two modes.
(a) General-purpose timer mode
(b) Up/down counter mode (UDC mode)
Cautions 1. The TCUD1n pin is used alternately for the UDC mode and the external capture function.
In the general-purpose timer mode, TMENC1n operates as a 16-bit interval timer, free-running timer, or
PWM output.
Counting is performed based on the clock selected by software. Division by the prescaler can be selected
for the count clock from among f
PRM1n.PRM1n2 to PRM1n.PRM1n0 bits (f
In the UDC mode, TMENC1n functions as a 16-bit up/down counter that performs counting based on the
TCUD1n and TIUD1n input signals. This mode is divided into the UDC mode A and UDC mode B,
depending on the condition of clearing TMENC1n.
V850E/IA3
V850E/IA4
TMENC1n
n = 0, 1
2. Continuous reading of TMENC1n is prohibited. If TMENC1n is continuously read, the
3. Writing the same value to the TMENC1n, CC1n0, and CC1n1 registers, and the STATUS1n
2. The TCLR1n pin is used alternately for the UDC mode and the external capture function.
After reset: 0000H
n = 0
disabled).
second value read may differ from the actual value. If TMENC1n must be read twice, be
sure to read another register between the first and the second read operation.
register is prohibited.
Writing the same value to the CCR1n, TUM1n, TMC1n, SESA1n, and PRM1n registers, and
CM1n0 and CM1n1 registers is permitted (writing the same value is guaranteed even
during a count operation).
Therefore, in the UDC mode, the external capture function cannot be used.
Therefore, when the TCLR1n input is used in UDC mode A, the external capture function
cannot be used.
15
14
13
R/W
12
User’s Manual U16543EJ4V0UD
11
Address: TMENC10 FFFFF580H, TMENC11 FFFFF5A0H
XX
10
/4, f
XX
XX
9
: Peripheral clock).
/8, f
8
XX
/16, f
7
XX
6
/32, f
5
XX
/64, f
4
3
XX
/128, or f
2
1
XX
0
/256, using the
Note
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