M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 257
M-V850E-IA4
Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Specifications of M-V850E-IA4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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TPkIOC2
TPnOPT0
(e) TMPk I/O control register 2 (TPkIOC2)
(f) TMPn option register 0 (TPnOPT0)
(g) TMPn counter read buffer register (TPnCNT)
(h) TMPn capture/compare registers 0 and 1 (TPnCCR0 and TPnCCR1)
Note Set the valid edge selection of the unused alternate external input signals to “No edge detection”.
The value of the 16-bit counter can be read by reading the TPnCNT register.
These registers function as capture registers or compare registers depending on the setting of the
TPkOPT0.TPkCCSa bit.
When the registers function as capture registers, they store the count value of the 16-bit counter when
the valid edge input to the TIPka pin is detected.
When the registers function as compare registers and when D
INTTPnCCa signal is generated when the counter reaches (D
TOP00 and TOPm1 pins are inverted.
Remark
0
0
V850E/IA3: n = 0 to 3, m = 0, 2, k = 0, 2, a = 0, 1
V850E/IA4: n = 0 to 3, m = 0, 2, 3, k = 0, 2, a = 0, 1
Figure 6-38. Register Setting in Free-Running Timer Mode (2/2)
0
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
TPkCCS1
0/1
0
TPkCCS0
0
0/1
User’s Manual U16543EJ4V0UD
TPkEES1
0/1
0
TPkEES0 TPkETS1 TPkETS0
0/1
0
0
0
a
a
is set to the TPnCCRa register, the
+ 1), and the output signals of the
TPnOVF
0/1
0
Select valid edge of external
event count input (TIPk0 pin)
Overflow flag
Specifies if TPkCCR0
register functions as
capture or compare register
0: Compare register
1: Capture register
Specifies if TPkCCR1
register functions as
capture or compare register
0: Compare register
1: Capture register
255
Note
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