M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 529

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.5.3 One-shot select mode operations
conversion results are stored in the ADAnCRm register. In the one-shot select mode, the 1-buffer mode and 4-buffer
mode are supported according to the method of storing the A/D conversion results.
In this mode, the analog input pin (ANInm)
Note Only the ANI00 and ANI01 pins can be used when A/D converter 0 of the V850E/IA3 is used.
Remark
(1) 1-buffer mode (1 buffer of software trigger one-shot select)
Remark
(1) The ADA0CE bit = 1 (enable)
(2) The ANI02 pin is A/D converted
(3) The conversion result is stored in the ADA0CR2 register
In this mode, the voltage of one analog input pin (ANInm)
are stored in one ADAnCRm register. The ANInm pin
Each time an A/D conversion is executed, an A/Dn conversion end interrupt request signal (INTADn) is
generated and A/D conversion ends. After the end of A/D conversion, the conversion operation is stopped.
If the ADAnM0.ADAnCE bit is set (1), A/D conversion can be restarted.
This mode is suitable for applications in which the results of each first-time A/D conversion are read.
Note Only the ANI00 and ANI01 pins can be used when A/D converter 0 of the V850E/IA3 is used.
Remark
Note Only the ANI00 and ANI01 pins can be used when A/D converter 0 of the V850E/IA3 is used.
ANInm
Analog Input Pin
n = 0, 1
m = 0 to 3
This is an operation example with the following setting.
ADA0M0.ADA0MD1 and ADA0M0.ADA0MD0 bits = 10, ADA0M0.ADA0TMD bit = 0,
ADA0M2.ADA0BS bit = 0, ADA0S.ADA0S2 to ADA0S.ADA0S0 bits = 010
ADA0M0
n = 0, 1
m = 0 to 3
Note
(1 Buffer of Software Trigger One-Shot Select): V850E/IA4
ADAnCRm
Figure 12-14. Example of 1-Buffer Mode Operation
A/D Conversion Result Register
ANI00
ANI01
ANI02
ANI03
CHAPTER 12 A/D CONVERTERS 0 AND 1
Note
User’s Manual U16543EJ4V0UD
specified by the ADAnS register is A/D converted continuously. The
(4) The ADA0M0.ADA0EF bit = 0
(5) The INTAD0 interrupt request signal is generated
Note
A/D converter 0
and the ADAnCRm register correspond one to one.
Note
is A/D converted once. The conversion results
ADA0CR0
ADA0CR1
ADA0CR2
ADA0CR3
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