M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 704
M-V850E-IA4
Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Specifications of M-V850E-IA4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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17.7 Multiple Interrupt Servicing Control
interrupted during servicing if there is an interrupt request signal with a higher priority level, and the higher priority
interrupt request signal is acknowledged and serviced first.
that interrupt request signal is held pending.
Thus, to execute multiple interrupts, it is necessary to set the interrupt enabled state (PSW.ID bit = 0) even in an
interrupt servicing routine.
exception servicing program, it is necessary to save EIPC and EIPSW.
702
Multiple interrupt servicing control is a process by which an interrupt request that is currently being serviced can be
If there is an interrupt request signal with a lower priority level than the interrupt request currently being serviced,
Multiple interrupt servicing control of maskable interrupts is executed when interrupts are enabled (PSW.ID bit = 0).
If maskable interrupts are enabled or a software exception is generated in a maskable interrupt or software
This is accomplished by the following procedure.
(1) Acknowledgment of maskable interrupt signals in servicing program
Service program of maskable interrupt or exception
• EIPC saved to memory or register
• EIPSW saved to memory or register
• EI instruction (interrupt acknowledgment enabled)
• DI instruction (interrupt acknowledgment disabled)
• Saved value restored to EIPSW
• Saved value restored to EIPC
• RETI instruction
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CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
User’s Manual U16543EJ4V0UD
← Maskable interrupt acknowledgment
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