M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 187

no-image

M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(4) TMPk I/O control register 1 (TPkIOC1)
Cautions 1. Rewrite the TPkIS3 to TPkIS0 bits when the TPkCTL0.TPkCE bit = 0.
The TPkIOC1 register is an 8-bit register that controls the valid edge for the capture trigger input signals
(TIPk0, TIPk1 pins).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Remark
2. The TPkIS3 to TPkIS0 bits are valid only in the free-running timer mode (only when the
TPkIOC1
(k = 0, 2)
(The same value can be written when the TPkCE bit = 1.) If rewriting was mistakenly
performed, clear the TPkCE bit to 0 and then set the bits again.
TPnOPT0.TPkCCS1, TPkCCS0 bits = 11) and the pulse width measurement mode. In all
other modes, a capture operation is not possible (TMP0, TMP2 only).
TMP1 and TMP3 do not have the TP1IOC1 and TP3IOC1 registers.
After reset: 00H
TPkIS3
TPkIS1
0
0
1
1
0
0
1
1
7
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
R/W
TPkIS2
TPkIS0
6
0
0
1
0
1
0
1
0
1
Address: TP0IOC1 FFFFF643H, TP2IOC1 FFFFF683H
User’s Manual U16543EJ4V0UD
No edge detection (capture operation invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
No edge detection (capture operation invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
Capture trigger input signal (TIPk1 pin) valid edge setting
Capture trigger input signal (TIPk0 pin) valid edge setting
5
0
4
0
TPkIS3
3
TPkIS2
2
TPkIS1
1
TPkIS0
0
185

Related parts for M-V850E-IA4