M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 785

no-image

M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Cautions 1. Do not directly connect the output pins (or I/O pins in the output state) of IC products to other
Capacitance (T
Notes 1. ANI00 to ANI03, ANI10 to ANI13, P70 to P77, PLLSIN, RESET, CMPREF
Cautions 1. Excludes the FLMD0 (
Operating Conditions (T
Input capacitance
I/O capacitance
Output capacitance
System clock frequency
CPU clock frequency
V
EV
AV
DD
DD
DD
, CV
voltage
voltage
Parameter
Parameter
2. P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P44, P50 to P52, PDL0 to PDL15
3. DDO (
DD
voltage
2. Product quality may suffer if the absolute maximum rating is exceeded even momentarily for
2. In addition to input capacitance, sampling capacitance is added to the ANI00 to ANI03, ANI10 to
output pins (including I/O pins in the output state), power supply pins such as V
GND pin. Direct connection of the output pins between an IC product and an external circuit is
possible, if the output pins can be set to the high-impedance state and the output timing of the
external circuit is designed to avoid output conflict.
any parameter. That is, the absolute maximum ratings are rated values at which the product is
on the verge of suffering physical damage, and therefore the product must be used under
conditions that ensure that the absolute maximum ratings are not exceeded.
The ratings and conditions indicated for DC characteristics and AC characteristics represent the
quality assurance range during normal operation.
ANI13, and ANI20 to ANI27 pins for sampling.
A
μ
= 25°C, V
PD70F3186 only)
V
A
Symbol
Symbol
DD
EV
AV
DD
= −40 to +85°C, V
f
C
C
, CV
f
CPU
C
XX
IO
O
DD
DD
I
CHAPTER 24 ELECTRICAL SPECIFICATIONS (V850E/IA4)
= V
DD
SS
fc = 1 MHz
Unmeasured pins returned to
0 V
PLL mode
Clock through mode
PLL mode
Clock through mode
V
EV
When A/D converters 0 to 2 are operating
When A/D converters 0 to 2 are not
operating
= EV
DD
μ
DD
PD70F3186 only), DRST (
= CV
= AV
DD
DD
= EV
DD
SS
User’s Manual U16543EJ4V0UD
= EV
PLLSIN = Low level
PLLSIN = High level
PLLSIN = Low level
PLLSIN = High level
SS
Conditions
Conditions
= CV
SS
= CV
DD
= CV
SS
Note 1
Note 2
Note 3
= AV
SS
μ
PD70F3186 only), X1, and X2 pins.
= AV
SS
= 0 V)
DD
= AV
6.875
MIN.
MIN.
0.5
2.3
4.0
4.5
4.0
32
55
4
4
SS
= 0 V)
TYP.
TYP.
MAX.
MAX.
2.7
5.5
5.5
5.5
15
15
15
55
64
55
64
8
8
DD
and EV
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit
pF
pF
pF
V
V
V
V
DD
783
, or

Related parts for M-V850E-IA4