M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 323
M-V850E-IA4
Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Specifications of M-V850E-IA4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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(2) Operation timing in external event count mode
Cautions 1. In the external event count mode, the TQ0CCR0 to TQ0CCR3 registers must not be cleared
(a) Operation if TQ0CCR0 register is set to FFFFH
If the TQ0CCR0 register is set to FFFFH, the 16-bit counter counts to FFFFH each time the valid edge of
the external event count signal has been detected.
synchronization with the next count-up timing, and the INTTQ0CC0 signal is generated. At this time, the
TQ0OPT0.TQ0OVF bit is not set.
INTTQ0CC0 signal
2. In the external event count mode, use of the timer output (TOQ00 to TOQ03) is disabled. If
TQ0CCR0 register
to 0000H.
using timer output (TOQ00 to TOQ03) with external event count input (EVTQ0), set the
interval timer mode, and enable the count clock operation with the external event count
input (TQ0CTL1.TQ0EEE bit = 1) (see 7.6.1 (3) Operation by external event count input
(EVTQ0)).
16-bit counter
TQ0CE bit
FFFFH
0000H
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
External event
count: FFFFH
User’s Manual U16543EJ4V0UD
External event
count: 10000H
FFFFH
The 16-bit counter is cleared to 0000H in
External event
count: 10000H
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