XC4VFX12-10SFG363C Xilinx Inc, XC4VFX12-10SFG363C Datasheet - Page 184

• Manufacturer Part Number: XC4VFX12-10SFG363C
• Description: IC FPGA VIRTEX-4 FX 12K 363FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX12-10SFG363C

• Number Of Logic Elements/cells: 12312
• Number Of Labs/clbs: 1368
• Total Ram Bits: 663552
• Number Of I /o: 240
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 363-FBGA, FCBGA
• Package: 363FCBGA
• Family Name: Virtex®-4
• Device Logic Units: 12312
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 240
• Ram Bits: 663552
• For Use With: HW-V4-ML403-UNI-G - EVALUATION PLATFORM VIRTEX-4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 5: Configurable Logic Blocks (CLBs)
Table 5-2: Virtex-4 FPGA Logic Resources Available in All CLBs
184
XC4VLX100
XC4VLX160
XC4VLX200
XC4VFX100
XC4VFX140
XC4VLX15
XC4VLX25
XC4VLX40
XC4VLX60
XC4VLX80
XC4VSX25
XC4VSX35
XC4VSX55
XC4VFX12
XC4VFX20
XC4VFX40
XC4VFX60
Device
Slice Description
CLB/Slice Configurations
Row x Column
CLB Array:
192 x 116
128 x 36
128 x 52
160 x 56
192 x 64
192 x 88
128 x 48
128 x 52
160 x 68
192 x 84
64 x 24
96 x 28
64 x 40
96 x 40
64 x 24
64 x 36
96 x 52
The elements common to both slice pairs (SLICEM and SLICEL) are two logic-function
generators (or look-up tables), two storage elements, wide-function multiplexers, carry
logic, and arithmetic gates. These elements are used by both SLICEM and SLICEL to
provide logic, arithmetic, and ROM functions. SLICEM supports two additional functions:
storing data using distributed RAM and shifting data with 16-bit registers. SLICEM
(shown in
all slices. SLICEL is shown in
Table 5-1
CLB or slice can be implemented in one of the configurations
available resources in all CLBs.
Table 5-1: Logic Resources in One CLB
Notes:
1. SLICEM only
Slices LUTs Flip-Flops
4
summarizes the logic resources in one CLB. All of the CLBs are identical and each
Figure 5-2, page
8
Number of
Slices
10,752
18,432
26,624
35,840
49,152
67,584
89,088
10,240
15,360
24,576
18,624
25,280
42,176
63,168
6,144
5,472
8,544
8
www.xilinx.com
185) represents a superset of elements and connections found in
Number
of LUTs
MULT_ANDs
135,168
178,176
126,336
Figure 5-3, page
12,288
21,504
36,864
53,248
71,680
98,304
20,480
30,720
49,152
10,944
17,088
37,248
50,560
84,352
8
Shift Registers (Kb)
Distributed RAM or
Carry Chains
Arithmetic &
186.
Maximum
2
1056
1392
168
288
416
560
768
160
240
384
134
291
395
659
987
96
86
UG070 (v2.6) December 1, 2008
listed.Table 5-2
Distributed
RAM
64 bits
Virtex-4 FPGA User Guide
(1)
of Flip-Flops
Number
135,168
178,176
126,336
Registers
12,288
21,504
36,864
53,248
71,680
98,304
20,480
30,720
49,152
10,944
17,088
37,248
50,560
84,352
shows the
64 bits
Shift
(1)
R