XC4VFX12-10SFG363C Xilinx Inc, XC4VFX12-10SFG363C Datasheet - Page 258

• Manufacturer Part Number: XC4VFX12-10SFG363C
• Description: IC FPGA VIRTEX-4 FX 12K 363FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX12-10SFG363C

• Number Of Logic Elements/cells: 12312
• Number Of Labs/clbs: 1368
• Total Ram Bits: 663552
• Number Of I /o: 240
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 363-FBGA, FCBGA
• Package: 363FCBGA
• Family Name: Virtex®-4
• Device Logic Units: 12312
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 240
• Ram Bits: 663552
• For Use With: HW-V4-ML403-UNI-G - EVALUATION PLATFORM VIRTEX-4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 6: SelectIO Resources
Table 6-5: LVCMOS, LVDCI, and LVDCI_DV2 DC Voltage Specifications at Various Voltage References
258
Notes: V
V
V
V
V
V
I
IN
CCO
IH
IL
OH
OL
[μA]
Standard
[V]
[V]
[V]
[V]
[V]
OL
and V
OH
LVDCI_DV2
for lower drive currents are sample tested.
Min
–0.5
3.0
2.0
2.6
–
–
A controlled impedance driver with half impedance (source termination) can also provide
drivers with one half of the impedance of the reference resistors. The I/O standards
supporting a controlled impedance driver with half impedance are: LVDCI_DV2_15,
LVDCI_DV2_18, and LVDCI_DV2_25.
driver with half impedance unidirectional and bidirectional termination.
To match the drive impedance to Z
reference resistor R must be twice Z
There are no drive strength settings for LVDCI drivers. When the driver impedance is one-
half of the VRN/VRP reference resistors, it is indicated by the addition of DV2 to the
attribute name.
Table 6-5
+3.3V
Typ
± 5
3.3
–
–
–
–
R 0 = ½R VRN = ½R VRP = Z 0
lists the LVCMOS, LVDCI, and LVDCI_DV2 voltage specifications.
Figure 6-31: Controlled Impedance Driver with Half Impedance
Figure 6-32: Controlled Impedance Driver with Half Impedance
Max
R 0 = ½R VRN = ½R VRP = Z 0
3.6
3.6
0.8
0.4
–
–
LVDCI_DV2
LVDCI_DV2
–0.5
Min
2.3
1.7
1.9
–
–
www.xilinx.com
+2.5V
Typ
2.5
± 5
–
–
–
–
IOB
Unidirectional Termination
IOB
Bidirectional Termination
0
Max
0
2.7
2.7
0.7
0.4
when using a driver with half impedance, the
.
–
–
Figure 6-31
Min
1.19
–0.5
Z 0
1.7
1.3
–
–
Z 0
and
+1.8V
Typ
± 5
1.8
–
–
–
–
Figure 6-32
IOB
IOB
R 0 = ½R VRN = ½R VRP = Z 0
Max
1.95
1.9
0.4
0.4
UG070 (v2.6) December 1, 2008
–
–
LVDCI_DV2
Virtex-4 FPGA User Guide
UG070_6_31_031308
illustrate a controlled
Min
1.43
1.05
–0.5
–
–
–
UG070_6_32_031308
LVDCI_DV2
+1.5V
1.05
Typ
1.5
± 5
–
–
–
Max
1.57
1.65
0.3
0.4
–
–
R