isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 107
isp1161bm
Manufacturer Part Number
isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1161BM.pdf
(137 pages)
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Philips Semiconductors
Table 102: DcScratch Information register: bit allocation
Table 104: DcFrameNumber register: bit allocation
[1]
9397 750 09567
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Reset value undefined after a bus reset.
[1]
[1]
R/W
15
15
R
R
0
7
0
0
7
0
13.3.4 Read Frame Number (R: B4H)
Code (Hex): B2/B3 — write/read DcScratch register
Transaction — write/read 1 word
reserved
Table 103: DcScratch Information register: bit description
This command returns the frame number of the last successfully received SOF. It is
followed by reading one word from the DcFrameNumber register, containing the
frame number. The DcFrameNumber register is shown in
Remark: After a bus reset, the value of the DcFrameNumber register is undefined.
Code (Hex): B4 — read frame number
Transaction — read 1 word
Table 105: DcFrameNumber register: bits description
Bit
15 to 13
12 to 0
Bit
15 to 11
10 to 8
7 to 0
R/W
R/W
14
14
R
R
0
6
0
0
6
0
Symbol
-
SFIR[12:0]
Symbol
-
SOFRH[2:0] SOF frame number (upper byte)
SOFRL[7:0] SOF frame number (lower byte)
reserved
R/W
13
13
R
R
0
5
0
0
5
0
Rev. 02 — 13 December 2002
Description
reserved
Description
reserved; must be logic 0
Scratch Information register
Full-speed USB single-chip host and device controller
R/W
R/W
12
12
R
R
0
4
0
0
4
0
SOFRL[7:0]
SFIR[7:0]
R/W
R/W
11
11
R
R
0
3
0
0
3
0
SFIR[12:8]
R/W
R/W
10
10
R
R
0
2
0
0
2
0
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Table
SOFRH[2:0]
104.
R/W
R/W
R
R
9
0
1
0
9
0
1
0
ISP1161
107 of 137
R/W
R/W
R
R
8
0
0
0
8
0
0
0
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