isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 57
isp1161bm
Manufacturer Part Number
isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1161BM.pdf
(137 pages)
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ISP1161BM
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Philips Semiconductors
Table 28:
9397 750 09567
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcRhDescriptorA register: bit description
31
23
15
0
7
0
10.3.1 HcRhDescriptorA register (R/W: 12H/92H)
Four registers are defined as follows:
Each register is read and written as a Dword. These registers are only written during
initialization to correspond with the system implementation. The HcRhDescriptorA
and HcRhDescriptorB registers should be implemented such that they are writeable
regardless of the HC’s USB states. HcRhStatus and HcRhPortStatus must be
writeable during the USBOPERATIONAL state.
The HcRhDescriptorA register is the first register of two describing the characteristics
of the Root Hub. Reset values are implementation specific. The descriptor length
(11), descriptor type and hub controller current (0) fields of the hub Class Descriptor
are emulated by the HCD. All other fields are located in the registers
HcRhDescriptorA and HcRhDescriptorB.
Remark: IS denotes an implementation specific reset value for that field.
Code (Hex): 12 — read
Code (Hex): 92 — write
reserved
•
•
•
•
HcRhDescriptorA
HcRhDescriptorB
HcRhStatus
HcRhPortStatus[1:NDP].
30
22
14
R
0
6
0
29
21
13
0
5
0
Rev. 02 — 13 December 2002
reserved
R
NOCP
Full-speed USB single-chip host and device controller
R/W
28
20
12
IS
4
0
POTPGT[7:0]
reserved
R/W
00H
R/W
IS
OCPM
R/W
27
19
11
IS
3
0
DT
26
18
10
R
0
2
0
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
NPS
R/W
25
17
IS
9
1
ISP1161
NDP[1:0]
IS
R
PSM
R/W
57 of 137
24
16
IS
8
0
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