isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 91

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isp1161bm

Manufacturer Part Number
isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet

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ISP1161BM
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12.4.2 Isochronous endpoints
the DcDMACounter register. When the internal counter completes the transfer as
programmed in the DMA counter, an EOT condition is generated and the DMA
operation stops.
Short packet:
before any DMA transfer takes place. When a short packet has been enabled as EOT
indicator (SHORTP = 1), the transfer size is determined by the presence of a short
packet in the data. This mechanism permits the use of a fully autonomous data
transfer protocol.
When reading from an OUT endpoint, reception of a short packet at an OUT token
will stop the DMA operation after transferring the data bytes of this packet.
Table 74:
[1]
A DMA transfer to/from an isochronous endpoint can be terminated by any of the
following conditions (bit names refer to the DcDMAConfiguration register, see
Table
Table 75:
EOT condition
EOT input
DcDMACounter register
Short packet
DMAEN bit in
DcDMAConfiguration register
EOT condition
EOT input active
DcDMACounter register zero
End-Of-Packet
An external End-Of-Transfer signal occurs on input EOT
The DMA transfer completes as programmed in the DcDMACounter register
(CNTREN = 1)
An End-Of-Packet (EOP) signal is detected
DMA operation is disabled by clearing bit DMAEN.
The DMA transfer stops. However, no interrupt is generated.
87):
Summary of EOT conditions for a bulk endpoint
Recommended EOT usage for isochronous endpoints
Normally, the transfer byte count must be set via a control endpoint
Rev. 02 — 13 December 2002
Full-speed USB single-chip host and device controller
OUT endpoint
EOT is active
transfer completes as
programmed in the
DcDMACounter register
short packet is received and
transferred
DMAEN = 0
OUT endpoint
do not use
do not use
preferred
[1]
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
IN endpoint
EOT is active
transfer completes as
programmed in the
DcDMACounter register
counter reaches zero in the
middle of the buffer
DMAEN = 0
IN endpoint
preferred
preferred
do not use
ISP1161
[1]
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