isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 30

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isp1161bm

Manufacturer Part Number
isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet

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Part Number:
ISP1161BM
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Philips Semiconductors
9397 750 09567
Product data
The actual requirement for the buffer RAM may not reach the maximum size. You can
make your selection based on your application. The following are some calculations
of the ISO_A or ISO_B space for a frame of data:
When the embedded system wants to initiate a transfer to the USB bus, the data
needed for one frame is transferred to the ATL buffer or ITL buffer. The
microprocessor detects the buffer status through the interrupt routines. When the
HcBufferStatus register (2CH - read only) indicates that buffer is empty, then the
microprocessor can write data into the buffer. When the HcBufferStatus register
indicates that buffer is full, that is data is ready on the buffer, the microprocessor
needs to read data from the buffer.
During every 1 ms, there might be many events to generate interrupt requests to the
microprocessor for data transfer or status retrieval. However, each of the interrupt
types defined in this specification can be enabled or disabled by setting the
Hc PInterruptEnable register bits accordingly.
The data transfer can be done via PIO mode or DMA mode. The data transfer rate
can go up to 15 Mbyte/s. In DMA operation, single-cycle or multi-cycle burst modes
are supported. For the multi-cycle burst mode, 1, 4 or 8 cycles per burst are
supported for ISP1161.
Fig 26. HC Internal FIFO buffer RAM partitions.
ATL buffer length = 0H, ITL buffer length = 800H.
This will use the internal FIFO buffer RAM for only ISO transfers.
Maximum number of useful data sent during one USB frame is 1280 bytes
(20 ISO packets of 64 bytes). Total RAM size needed for this is:
20
Maximum number of packets for different endpoints sent during one USB frame is
150 (150 ISO packets of 1 byte). Total RAM size needed is:
150
The Ping buffer RAM (ITL0) and the Pong buffer RAM (ITL1) have a maximum size
of 2 kbytes each. All data needed for one frame can be stored in the Ping or the
Pong buffer RAM.
8 + 1280 = 1440 bytes.
8 + 150
ATL buffer
ITL buffer
Rev. 02 — 13 December 2002
1 = 1350 bytes.
bottom
ITL0
ITL1
ATL
top
Full-speed USB single-chip host and device controller
control/bulk/interrupt
FIFO buffer RAM
ISO_A
ISO_B
not used
data
MGT950
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
4 kbytes
programmable
sizes
ISP1161
30 of 137

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