isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 66

• Manufacturer Part Number: isp1161bm
• Description: Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 36:
9397 750 09567
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcHardwareConfiguration register: bit allocation
EOTInput
Polarity
R/W
15
0
7
0
10.4.1 HcHardwareConfiguration register (R/W: 20H/A0H)
10.4 HC DMA and interrupt control registers
DACKInput
Code (Hex): 20 — read
Code (Hex): A0 — write
reserved
Table 37:
Bit
15 to 13 -
12
11
10
9
8
7
6
Polarity
•
•
R/W
R/W
Bit 0 (InterruptPinEnable) is used as pin INT1’s master interrupt enable. This bit
should be used together with the register Hc PInterruptEnable to enable pin INT1.
Bits 4 and 3 (DataBusWidth[1:0]) are fixed at logic 0 and logic 1, respectively, for
ISP1161.
14
0
6
0
Symbol
2_DownstreamPort15Kresistor
Sel
SuspendClkNotStop
AnalogOCEnable
-
DACKMode
EOTInputPolarity
DACKInputPolarity
HcHardwareConfiguration register: bit description
Polarity
Output
DREQ
R/W
13
0
5
1
Rev. 02 — 13 December 2002
15Kresistor
streamPort
2_Down
DataBusWidth[1:0]
Full-speed USB single-chip host and device controller
R/W
Sel
12
0
4
0
R/W
ClkNotStop
Suspend
Description
reserved
0 — use external 15 k resistors for downstream
ports
1 — use built-in resistors for downstream ports
0 — clock can be stopped
1 — clock can not be stopped
0 — use external OC detection. Digital input
1 — use on-chip OC detection. Analog input
reserved
0 — normal operation. DACK1 is used with read
and write signals. Power-up value.
1 — reserved
0 — active LOW. Power-up value
1 — active HIGH
0 — active LOW. Power-up value
1 — reserved
R/W
11
0
3
1
AnalogOC
Interrupt
Polarity
Enable
Output
R/W
R/W
10
0
2
0
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
PinTrigger
reserved
Interrupt
R/W
R/W
9
0
1
0
ISP1161
DACKMode
PinEnable
Interrupt
R/W
R/W
66 of 137
8
0
0
0