isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 8
isp1161bm
Manufacturer Part Number
isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1161BM.pdf
(137 pages)
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Part Number:
ISP1161BM
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9397 750 09567
Product data
Table 2:
Symbol
D6
D7
DGND
D8
D9
D10
D11
D12
D13
DGND
D14
D15
DGND
V
n.c.
CS
RD
WR
V
DREQ1
DREQ2
DACK1
hold1
hold2
[1]
Pin description
Pin
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Rev. 02 — 13 December 2002
Type
I/O
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
I/O
-
-
-
I
I
I
-
O
O
I
…continued
Full-speed USB single-chip host and device controller
Description
bit 6 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 7 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
bit 8 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 9 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 10 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 11 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 12 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 13 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
bit 14 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 15 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
voltage holding pin; internally connected to the V
V
output 3.3 V, hence do not connect it to 5 V. When V
connected to 3.3 V, this pin can either be connected to
3.3 V or left unconnected. In all cases, decouple this pin to
DGND.
no connection
chip select input
read strobe input
write strobe input
voltage holding pin; internally connected to the V
V
output 3.3 V, hence do not connect it to 5 V. When V
connected to 3.3 V, this pin can either be connected to
3.3 V or left unconnected. In all cases, decouple this pin to
DGND.
HC’s DMA request output 1 (programmable polarity);
signals to the DMA controller that the ISP1161 wants to
start a DMA transfer; see
DC’s DMA request output 2 (programmable polarity);
signals to the DMA controller that the ISP1161 wants to
start a DMA transfer; see
HC’s DMA acknowledge input 1; when not in use, this pin
must be connected to V
hold2
hold1
pins. When V
pins. When V
CC
CC
is connected to 5 V, this pin will
is connected to 5 V, this pin will
CC
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Section 10.4.1
Section 13.1.4
via an external 10 k resistor
ISP1161
reg(3.3)
reg(3.3)
CC
CC
8 of 137
and
and
is
is
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