isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 60

• Manufacturer Part Number: isp1161bm
• Description: Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 32:
9397 750 09567
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcRhStatus register: bit allocation
CRWE
DRWE
R/W
31
23
15
W
0
0
10.3.3 HcRhStatus register (R/W: 14H/94H)
Table 31:
The HcRhStatus register is divided into two parts. The lower word of a Dword
represents the Hub Status field and the upper word represents the Hub Status
Change field. Reserved bits should always be written as logic 0.
Code (Hex): 14 — read
Code (Hex): 94 — write
Bit
31 to 19
18 to 16
15 to 3
2 to 0
30
22
14
0
HcRhDescriptorB register: bit description
Symbol
-
PPCM[2:0]
-
DR[2:0]
29
21
13
0
Rev. 02 — 13 December 2002
reserved
R
0
Description
reserved
PortPowerControlMask: Each bit indicates whether a port is
affected by a global power control command when
PowerSwitchingMode is set. When set, the port’s power state is
only affected by per-port power control (Set/ClearPortPower).
When cleared, the port is controlled by the global power switch
(Set/ClearGlobalPower). If the device is configured to global
switching mode (PowerSwitchingMode = 0), this field is not valid.
bit 0 — reserved
bit 1 — Ganged-power mask on Port 1
bit 2 — Ganged-power mask on Port 2
reserved
DeviceRemovable: Each bit is dedicated to a port of the Root
Hub. When cleared, the attached device is removable. When set,
the attached device is not removable.
bit 0 — reserved
bit 1 — Device attached to Port 1
bit 2 — Device attached to Port 2
Full-speed USB single-chip host and device controller
28
20
12
0
reserved
reserved
27
19
11
R
R
0
0
26
18
10
0
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
OCIC
R/W
25
17
0
9
0
ISP1161
LPSC
R/W
60 of 137
24
16
0
8
0