isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 9

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isp1161bm

Manufacturer Part Number
isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1161BM
Manufacturer:
NXP
Quantity:
10 000
Philips Semiconductors
9397 750 09567
Product data
Table 2:
Symbol
DACK2
INT1
INT2
TEST
RESET
NDP_SEL
EOT
DGND
D_SUSPEND
D_WAKEUP
GL
D_VBUS
H_WAKEUP
CLKOUT
H_SUSPEND
XTAL1
XTAL2
DGND
[1]
Pin description
Pin
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
Rev. 02 — 13 December 2002
Type
I
O
O
O
I
I
I
-
O
I
O
I
I
O
O
I
O
-
…continued
Full-speed USB single-chip host and device controller
Description
DC’s DMA acknowledge input 2; when not in use, this pin
must be connected to V
HC’s interrupt output; programmable level, edge triggered
and polarity; see
DC’s interrupt output; programmable level, edge triggered
and polarity; see
test output; this pin is used for test purposes only; leave
this pin open
reset input (Schmitt trigger); a LOW level produces an
asynchronous reset (internal pull-up resistor)
indicates to the Host Controller software the number of
downstream ports present:
0 — select 1 downstream port
1 — select 2 downstream ports
only changes the value of the NDP field in the
HcRhDescriptorA register; both ports will always be
enabled
DMA master device to inform ISP1161 of end of DMA
transfer; active level is programmable; see
digital ground
DC’s ‘suspend’ state indicator output; active HIGH
DC’s wake-up input; generates a remote wake-up from
‘suspend’ state (active HIGH); when not in use, this pin
must be connected to DGND via an external 10 k resistor
(internal pull-up resistor)
GoodLink LED indicator output (open-drain, 8 mA); the
LED is ON by default, blinks OFF upon USB traffic; to
connect an LED, use a series resistor of 470
(V
DC’s USB upstream port V
use, this pin must be connected to DGND via a 1 M
resistor
HC’s wake-up input; generates a remote wake-up from
‘suspend’ state (active HIGH); when not in use, this pin
must be connected to DGND via an external 10 k resistor
(internal pull-up resistor)
programmable clock output (3 to 48 MHz); default 12 MHz
HC’s ‘suspend’ state indicator output; active HIGH
crystal input; connected directly to a 6 MHz crystal; when it
is connected to an external clock oscillator, leave
pin XTAL2 open
crystal output; connected directly to a 6 MHz crystal; when
pin XTAL1 is connected to an external clock oscillator,
leave this pin open
digital ground
CC
= 5.0 V) or 330
Section 10.4.1
Section 13.1.4
(V
CC
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
CC
via an external 10 k resistor
BUS
= 3.3 V)
sensing input; when not in
ISP1161
Section 10.4.1
9 of 137

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