IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 280

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

4–18
Table 4–29. Logical Bus Operator Block Parameters
Table 4–30. Logical Bus Operator Block I/O Formats
DSP Builder Standard Blockset Libraries
Bus Type
[number of bits].[]
[].[number of bits]
Logical Operation
Mask Value
Number of Bits to Shift User Defined
Sign Extend
I
O
Notes to
(1) For signed integers and signed binary fractional numbers, the MSB is the sign bit.
(2) [L] is the number of bits on the left side of the binary point; [R] is the number of bits on the right side of the binary point. For signed or unsigned
(3) I1
(4) Explicit means that the port bit width information is a block parameter. Implicit means that the port bit width information is set by the datapath
I/O
integers R = 0, that is, [L].[0]. For single bits, R = 0, that is, [1] is a single bit.
bit width propagation mechanism. To specify the bus format of an implicit input port, use a Bus Conversion block to set the width.
I1
O1
[L].[R]
[L1].[R1]
[L1].[R1]
Table
Name
Simulink (2),
is an input port. O1
4–30:
Table 4–28
Table 4–28. Logical Bus Operator Block Inputs and Outputs
Table 4–29
Table 4–30
(3)
d
q
Signed Integer,
Signed Fractional,
Unsigned Integer
>= 0
(Parameterizable)
>= 0
(Parameterizable)
AND, OR, XOR,
Invert, Shift Left,
Shift Right,
Rotate Left,
Rotate Right
Integer
(Parameterizable)
(Parameterizable)
On or Off
[L].[R]
Signal
Value
is an output port.
I1: in STD_LOGIC_VECTOR({L1 + R1 - 1} DOWNTO 0)
O1: out STD_LOGIC_VECTOR({L1 + R1 - 1} DOWNTO 0)
shows the Logical Bus Operator block inputs and outputs.
shows the Logical Bus Operator block parameters.
shows the Logical Bus Operator block I/O formats.
Input
Output
Direction
Specify the bus number format that you want to use.
Specify the number of bits to the left of the binary point, including the sign
bit.
Specify the number of bits to the right of the binary point.
Specify the logical operation to perform.
Specify the mask value for an AND, OR, or XOR operation as an unsigned
integer representing the required mask, which must have the same number of
bits as the input.
Specify how many bits you want to shift when you chose a shift or rotate
operation.
Turn on to preserve the input data sign when right shifting signed data.
(Note 1)
Preliminary
Input data.
Output data.
VHDL
Description
Description
Chapter 4: Gate & Control Library
© June 2010 Altera Corporation
Logical Bus Operator
Type
Explicit
Explicit
(4)