IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 299

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 5: Interfaces Library
Avalon-ST Packet Format Converter
Table 5–9. Signals Supported by the Avalon-ST Packet Format Converter Block (Part 1 of 2)
© June 2010 Altera Corporation
reset_n
inX_dataN
inX_empty
Signal
f
1
Figure 5–10
Figure 5–10. Basic Packet Format Converter
The PFC performs data mapping on a packet by packet basis, so that there is exactly
one input packet on each input interface for one output packet on each output
interface. The interface with the longest packet limits the packet rate of the converter.
When the PFC has multiple output interfaces, the packets on each output interface are
aligned so that the startofpacket signal is presented on the same clock cycle.
If each interface supports fixed-length packets, you can select a Multi-Packet
Mapping option. The PFC can then map fields from multiple input packets to
multiple output packets. The PFC does not support bursts or blocks on its output
interfaces.
Use the Split Data option to split the input or output data signals across additional
ports named data0 through dataN.
Each input interface consists of the ready, valid, startofpacket, endofpacket,
empty, and data signals. Each output interface has an additional error signal that
asserts to indicate a frame delineation error.
For more information about these signal types, refer to the
Specifications.
The PFC block does not support Avalon-ST bursts or blocks on its output interfaces.
Table 5–9
Converter block.
Direction
Input
Input
Input
lists the signals supported by the Avalon-ST Packet Format
shows the basic operation of the PFC.
Active-low reset signal.
Data input bus for sink interface X.
Indicates the number of empty symbols for sink interface X during cycles that
mark the end of a packet.
Preliminary
Description
DSP Builder Standard Blockset Libraries
Avalon Interface
5–13