IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 387

DSP BUILDER SOFTWARE

IPT-DSPBUILDER

Manufacturer Part Number
IPT-DSPBUILDER
Description
DSP BUILDER SOFTWARE
Manufacturer
Altera
Type
DSPr
Datasheet

Specifications of IPT-DSPBUILDER

Function
DSP Builder
License
Initial License
Software Application
IP CORE, DSP BUILDER
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
Not applicable / Not applicable
Chapter 11: Boards Library
Stratix EP1S80 DSP Board
Stratix EP1S80 DSP Board
Table 11–7. Stratix EP1S80 DSP Board Blocks
© June 2010 Altera Corporation
f
Block
A2D_1 and A2D_2
D2A_1 and D2A_2
DEBUGA and
DEBUGB
Dip Switch
EVAL IO IN and
EVAL IO OUT
LED0 and LED1
PROTO
RS232 ROUT and
RS232 TIN
Display0 and
Display1
SW0–SW2
The Stratix EP1S80 DSP board is a powerful development platform for digital signal
processing (DSP) designs, and features the Stratix EP1S80 device in the speed grade
(-6) 956-pin package.
Table 11–7
For information about setting up the board, refer to the
Stratix Professional Edition Getting Started User
supported hardware features, refer to the
Sheet.
Figure 11–12
lists the blocks available to support the Stratix EP1S80 DSP board.
Controls the 12-bit signed analog-to-digital converters (U10, U30). You can
optionally specify the clock signal.
Controls the 14-bit unsigned digital-to-analog converters (U21, U23)
Mictor connectors, which control debugging ports A and B. You can optionally
specify Input or Output node type, specify the input clock signal, and specify the
pin location for each port (J9, J10).
Controls the user-definable dual in-line package switch (SW3). You can optionally
specify the clock signal.
Controls the evaluation input and outputs. You can optionally specify the clock signal
for EVAL IO IN and specify the pin location for each input or output (JP7, JP19,
JP22, JP20, JP21, JP24, JP8).
Controls two user-definable LEDs (D6, D7).
Expansion connector, which controls the prototyping area I/O. You can optionally
specify Input or Output node type, specify the input clock signal, and specify the
pin locations (J20, J21, J24).
Controls the RS232 serial receive output and transmit input (J8). You can optionally
specify the clock signal for RS232 TIN.
Controls a dual user-definable seven-segment LED display (D4).
Controls three user-definable push-button switches (SW0–SW2). You can optionally
specify the clock signal.
shows the design example for the Stratix EP1S80 DSP board.
Preliminary
Stratix EP1S80 DSP Development Board Data
Description
Guide. For information about the
DSP Development Kit, Stratix &
DSP Builder Standard Blockset Libraries
11–13

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