HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 301
HD64F7047FW40V
Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet
1.HD64F7047F50V.pdf
(766 pages)
Specifications of HD64F7047FW40V
Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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10.7.3
When counter clearing on compare match is set, TCNT is cleared in the final state in which it
matches the TGR value (the point at which the count value matched by TCNT is updated).
Consequently, the actual counter frequency is given by the following formula:
Where
10.7.4
If the counter clear signal is generated in the T2 state of a TCNT write cycle, TCNT clearing takes
precedence and the TCNT write is not performed.
Figure 10.71 shows the timing in this case.
f =
Pφ
Address
Write signal
Counter clear
signal
TCNT
Caution on Period Setting
Contention between TCNT Write and Clear Operations
f: Counter frequency
Pφ: Peripheral clock operating frequency
N: TGR set value
Figure 10.71 Contention between TCNT Write and Clear Operations
(N + 1)
Pφ
TCNT write cycle
N
TCNT address
T1
T2
H'0000
Rev. 2.00, 09/04, page 259 of 720
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