HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 84
HD64F7047FW40V
Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet
1.HD64F7047F50V.pdf
(766 pages)
Specifications of HD64F7047FW40V
Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Manufacturer
Quantity
Price
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2.6
2.6.1
The CPU has five processing states: reset, exception processing, bus release, program execution
and power-down. Figure 2.4 shows the transitions between the states.
Rev. 2.00, 09/04, page 42 of 720
RES = 0
HSTBY = 1
When an internal power-on
reset by WDT or internal
manual reset by
WDT occurs
Processing States
State Transitions
Bus request
generated
Bus release state
From any state
when RES = 0
and HSTBY = 1
Sleep mode
Figure 2.4 Transitions between Processing States
Bus request
cleared
Bus request
cleared
From any state when
RES = 0 and HSTBY = 0
Power-on reset state
Bus request
generated
Bus request
generated
Hardware standby mode
Bus request
cleared
SSBY bit cleared
for SLEEP
instruction
processing
Exception
Program execution state
source
occurs
processing state
RES = 1
From any state when
RES = 1, MRES = 0,
and HSTBY = 1
Exception
RES = 0
Exception
processing
ends
RES = 1,
MRES = 1
Manual reset state
Software standby mode
SSBY bit set
for SLEEP
instruction
Reset state
NMI interrupt or IRQ
interrupt occurs
Power-down mode
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