HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 478
HD64F7047FW40V
Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet
1.HD64F7047F50V.pdf
(766 pages)
Specifications of HD64F7047FW40V
Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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15.3.11 Abort Acknowledge Registers (ABACK1, ABACK0)
ABACK1 and ABACK0 are 16-bit registers containing status flags that indicate normal
cancellation (abort) of mailbox transmit messages.
• ABACK1
Rev. 2.00, 09/04, page 436 of 720
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
ABACK31
ABACK30
ABACK29
ABACK28
ABACK27
ABACK26
ABACK25
ABACK24
ABACK23
ABACK22
ABACK21
ABACK20
ABACK19
ABACK18
ABACK17
ABACK16
Initial Value R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Status flags that indicate error-free cancellation of
the transmit message in the corresponding
mailboxes from 16 to 31. When the message in
mailbox n (n = 16 to 31) has been canceled error-
free, ABACKn is set to 1.
[Setting condition]
•
[Clearing condition]
•
Notes: 1. Writing operation by the CPU is valid only
Completion of transmit message abort for
corresponding mailbox
Writing 1
2. Restrictions apply to the use of the
for clearing condition (writing 1) of set
status.
mailbox 31 for transmission. Carefully
read section 15.8, Usage Notes.
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