HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 418

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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12.7
12.7.1
Table 12.10 shows the interrupt sources in normal serial communication interface mode. A
different interrupt vector is assigned to each interrupt source, and individual interrupt sources can
be enabled or disabled using the enable bits in SCR.
When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND
flag in SSR is set to 1, a TEI interrupt request is generated. A TXI interrupt request can activate
the DTC to perform data transfer. The TDRE flag is cleared to 0 automatically when data transfer
is performed by the DTC.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,
PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated. An RXI interrupt
request can activate the DTC to perform data transfer. The RDRF flag is cleared to 0
automatically when data transfer is performed by the DTC.
A TEI interrupt is generated when the TEND flag is set to 1 while the TEIE bit is set to 1. If a TEI
interrupt and a TXI interrupt are generated simultaneously, the TXI interrupt has priority for
acceptance. However, note that if the TDRE and TEND flags are cleared simultaneously by the
TXI interrupt routine, the SCI cannot branch to the TEI interrupt routine later.
Table 12.10 SCI Interrupt Sources
Rev. 2.00, 09/04, page 376 of 720
Channel
2
3
4
SCI Interrupts
Interrupts in Normal Serial Communication Interface Mode
Name
ERI_2
RXI_2
TXI_2
TEI_2
ERI_3
RXI_3
TXI_3
TEI_3
ERI_4
RXI_4
TXI_4
TEI_4
Interrupt Source
Receive Error
Receive Data Full
Transmit Data Empty
Transmission End
Receive Error
Receive Data Full
Transmit Data Empty
Transmission End
Receive Error
Receive Data Full
Transmit Data Empty
Transmission End
Interrupt Flag
ORER, FER, PER
RDRF
TDRE
TEND
ORER, FER, PER
RDRF
TDRE
TEND
ORER, FER, PER
RDRF
TDRE
TEND
DTC Activation
Not possible
Possible
Possible
Not possible
Not possible
Possible
Possible
Not possible
Not possible
Possible
Possible
Not possible

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