HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 524
HD64F7047FW40V
Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet
1.HD64F7047F50V.pdf
(766 pages)
Specifications of HD64F7047FW40V
Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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• Transmitting cancellation of mailbox 31 cannot be performed by event trigger transmit.
Note: Mailbox 31 should be used for reception.
15.8.13 Setting and Cancellation of Transmission during Bus-Idle State
After a transmission request has been issued (TXPR is set) while in the bus-idle state, if another
transmission request is issued (TXPR is set) or the transmission is cancelled (TXCR is set)
immediately before the SOF, transmission may not be carried out correctly.
Software Measure:
• Program so that the TXPR bits are set by package to all the mail boxes that require
• To cancel transmission, allow more than 50 µs after the TXPR register has been set, then set
The values of the time interval from TXPR setting to TXCR setting, indicated above, is for a
guide. For further details, please contact your nearest Renesas Technology sales office.
15.8.14 Releasing HCAN2 Reset
Before releasing HCAN2 software reset mode (MCR0 = 0), confirm in advance that the reset
status bit (GSR3) is set to 1.
15.8.15 Accessing Mailboxes When HCAN2 Is in Sleep Mode
Mailboxes should not be accessed when the HCAN2 is in sleep mode. If mailboxes are accessed in
sleep mode, the CPU may stop. However, the CPU does not stop when registers that are not
relevant to mailboxes are accessed in sleep mode or mailboxes are accessed in other modes.
15.8.16 Module Standby Mode Setting
HCAN2 operation can be disabled or enabled using the module standby control register. The
initial setting is for HCAN2 operation to be halted. Register access is enabled by clearing module
standby mode. For details, refer to section 24, Power-Down Modes.
Rev. 2.00, 09/04, page 482 of 720
will start and proceed normally. In such a case, however, incorrect clearing of the transmit wait
register (TXPR) and setting of the flag in the abort acknowledge register (ABACK) may occur.
transmission wait until the transmission from all of the specified mailboxes is completed,
confirm that the TXPR has been cleared to 0, then set the TXPR again.
the TXCR.
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