AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 1029
AT91SAM9G45-CU-999
Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9G45-EKES.pdf
(1218 pages)
Specifications of AT91SAM9G45-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Manufacturer
Quantity
Price
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42.5.2
42.5.3
42.6
6438F–ATARM–21-Jun-10
Functional Description
Power Management
Interrupt Sources
All of the PWM outputs may or may not be enabled. If an application requires only four channels,
then only four PIO lines will be assigned to PWM outputs.
Table 42-2.
The PWM is not continuously clocked. The programmer must first enable the PWM clock in the
Power Management Controller (PMC) before using the PWM. However, if the application does
not require PWM operations, the PWM clock can be stopped when not needed and be restarted
later. In this case, the PWM will resume its operations where it left off.
Configuring the PWM does not require the PWM clock to be enabled.
The PWM interrupt line is connected on one of the internal sources of the Advanced Interrupt
Controller. Using the PWM interrupt requires the AIC to be programmed first. Note that it is not
recommended to use the PWM interrupt line in edge sensitive mode.
Table 42-3.
The PWM macrocell is primarily composed of a clock generator module and
Instance
– Clocked by the system clock, MCK, the clock generator module provides 13 clocks.
– Each channel can independently choose one of the clock generator outputs.
– Each channel generates an output waveform with attributes that can be defined
Instance
PWM
independently for each channel through the user interface registers.
PWM
PWM
PWM
PWM
PWM
PWM
PWM
I/O Lines
Peripheral IDs
19
ID
Signal
PWM0
PWM1
PWM1
PWM2
PWM2
PWM3
PWM3
I/O Line
PD24
PD25
PD31
PD26
PE31
AT91SAM9G45
PA25
PD0
4
channels.
Peripheral
B
B
B
B
A
B
B
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