AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 895
AT91SAM9G45-CU-999
Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9G45-EKES.pdf
(1218 pages)
Specifications of AT91SAM9G45-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Manufacturer
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Price
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39. Image Sensor Interface (ISI)
39.1
39.2
6438F–ATARM–21-Jun-10
Description
Embedded Characteristics
The Image Sensor Interface (ISI) connects a CMOS-type image sensor to the processor and
provides image capture in various formats. It does data conversion, if necessary, before the stor-
age in memory through DMA.
The ISI supports color CMOS image sensor and grayscale image sensors with a reduced set of
functionalities.
In grayscale mode, the data stream is stored in memory without any processing and so is not
compatible with the LCD controller.
Internal FIFOs on the preview and codec paths are used to store the incoming data. The RGB
output on the preview path is compatible with the LCD controller. This module outputs the data
in RGB format (LCD compatible) and has scaling capabilities to make it compliant to the LCD
display resolution (See
Several input formats such as preprocessed RGB or YCbCr are supported through the data bus
interface.
It supports two modes of synchronization:
Using EAV/SAV for synchronization reduces the pin count (ISI_VSYNC, ISI_HSYNC not used).
The polarity of the synchronization pulse is programmable to comply with the sensor signals.
Table 39-1.
Signal
ISI_VSYNC
ISI_HSYNC
ISI_DATA[11..0]
ISI_MCK
ISI_PCK
1. The hardware with ISI_VSYNC and ISI_HSYNC signals
2. The International Telecommunication Union Recommendation ITU-R BT.656-4 Start-of-
• ITU-R BT. 601/656 8-bit mode external interface support
• Support for ITU-R BT.656-4 SAV and EAV synchronization
• Vertical and horizontal resolutions up to 2048 x 2048
• Preview Path up to 640*480
• Support for packed data formatting for YCbCr 4:2:2 formats
• Preview scaler to generate smaller size image
Active-Video (SAV) and End-of-Active-Video (EAV) synchronization sequence.
I/O Description
Table 39-3 on page
OUT
Dir
IN
IN
IN
IN
Description
Vertical Synchronization
Horizontal Synchronization
Sensor Pixel Data
Master Clock Provided to the Image Sensor
Pixel Clock Provided by the Image Sensor
898).
AT91SAM9G45
895
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