AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 295
AT91SAM9G45-CU-999
Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9G45-EKES.pdf
(1218 pages)
Specifications of AT91SAM9G45-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (19Mb)
24.5.1
24.5.2
24.5.3
24.5.4
Register Name:SCKCR
Address:
Access Type:Read/Write
6438F–ATARM–21-Jun-10
31
23
15
–
–
–
7
–
Switch from Internal RC Oscillator to the 32768 Hz Crystal
Bypass the 32768 Hz Oscillator
Switch from 32768 Hz Crystal to the Internal RC oscillator
Slow Clock Configuration Register
0xFFFFFD50
30
22
14
–
–
–
6
–
To switch from internal RC oscillator to the 32768 Hz crystal, the programmer must execute the
following sequence:
The following step must be added to bypass the 32768Hz Oscillator.
The same procedure must be followed to switch from 32768Hz crystal to the internal RC
oscillator.
• Switch the master clock to a source different from slow clock (PLLA or PLLB or Main
• Enable the 32768 Hz oscillator by setting the bit OSCEN to 1.
• Wait
• Switch from internal RC to 32768Hz by setting the bit OSCSEL to 1.
• Wait 5 slow clock cycles for internal resynchronization
• Disable the RC oscillator by setting the bit RCEN to 0.
• An external clock must be connected on XIN32.
• Enable the bypass path OSC32BYP bit set to 1.
• Disable the 32768 Hz oscillator by setting the bit OSC32EN to 0.
• Switch the master clock to a source different from slow clock (PLLA or PLLB or Main
• Enable the internal RC oscillator by setting the bit RCEN to 1.
• Wait
• Switch from 32768Hz oscillator to internal RC by setting the bit OSCSEL to 0
• Wait 5 slow clock cycles for internal resynchronization
• Disable the 32768Hz oscillator by setting the bit OSC32EN to 0
Oscillator) through the Power management Controller.
Oscillator)
32768 Hz Startup Time for clock stabilization (software loop)
internal RC Startup Time for clock stabilization (software loop)
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
OSCSEL
27
19
11
–
–
–
3
OSC32BYP
26
18
10
–
–
–
2
AT91SAM9G45
OSC32EN
25
17
–
–
9
–
1
RCEN
24
16
–
–
8
–
0
295
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