AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 981

IC MCU ARM9 APMC 324TFBGA

AT91SAM9G45-CU-999

Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9G45-CU-999

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9G45-CU-999
Manufacturer:
Atmel
Quantity:
10 000
Figure 41-5. Multi Buffer Transfer Using Linked List
6438F–ATARM–21-Jun-10
DSCRx(0)
DSCRx(1)
CTRLBx
CTRLAx
DADDRx
SADDRx
The Linked List multi-buffer transfer is initiated by programming DMAC_DSCRx with DSCRx(0)
(LLI(0) base address) and DMAC_CTRLBx register with both SRC_DSCR and DST_DSCR set
to 0. Other fields and registers are ignored and overwritten when the descriptor is retrieved from
memory.
The last transfer descriptor must be written to memory with its next descriptor address set to 0.
= DSCRx(0) + 0xC
= DSCRx(0) + 0x8
= DSCRx(0) + 0x4
LLI(0)
= DSCRx(0) + 0x0
= DSCRx(0) + 0x10
System Memory
DSCRx(1)
DSCRx(2)
CTRLBx
CTRLBx
DADDRx
SADDRx
LLI(1)
= DSCRx(1) + 0xC
= DSCRx(1) + 0x8
= DSCRx(1) + 0x4
= DSCRx(1) + 0x0
= DSCRx(1) + 0x10
AT91SAM9G45
DSCRx(2)
(points to 0 if
LLI(1) is the last
transfer descriptor
981

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