AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 71
AT91SAM9G45-CU-999
Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9G45-EKES.pdf
(1218 pages)
Specifications of AT91SAM9G45-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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12. Reset Controller (RSTC)
12.1
12.2
12.3
Figure 12-1. Reset Controller Block Diagram
6438F–ATARM–21-Jun-10
Description
Embedded Characteristics
Block Diagram
Backup Supply
Main Supply
WDRPROC
POR
POR
wd_fault
The Reset Controller (RSTC), based on power-on reset cells, handles all the resets of the sys-
tem without any external components. It reports which reset occurred last.
The Reset Controller also drives independently or simultaneously the external reset and the
peripheral and processor resets.
The Reset Controller is based on two Power-on-Reset cells, one on VDDBU and one on
VDDCORE.
The Reset Controller is capable to return to the software the source of the last reset, either a
general reset (VDDBU rising), a wake-up reset (VDDCORE rising), a software reset, a user
reset or a watchdog reset.
The Reset Controller controls the internal resets of the system and the NRST pin. The NRST pin
is bidirectional. It is handled by the on-chip reset controller and can be driven low to provide a
reset signal to the external components or asserted low externally to reset the microcontroller. It
will reset the Core and the peripherals except the Backup region. There is no constraint on the
length of the reset pulse and the reset controller can guarantee a minimum pulse length.
The NRST pin integrates a permanent pull-up resistor to VDDIOP0 of about 100 kOhms.
The configuration of the Reset Controller is saved as supplied on VDDBU.
NRST
nrst_out
Reset Controller
Counter
Startup
Manager
NRST
user_reset
exter_nreset
SLCK
Manager
Reset
State
rstc_irq
proc_nreset
periph_nreset
backup_neset
AT91SAM9G45
71
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