AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 1171
AT91SAM9G45-CU-999
Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9G45-EKES.pdf
(1218 pages)
Specifications of AT91SAM9G45-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Part Number
Manufacturer
Quantity
Price
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Table 46-28. SMC Read Signals - NRD Controlled (READ_MODE= 1) (Continued)
Table 46-29. SMC Read Signals - NCS Controlled (READ_MODE= 0)
46.13.2.3
Table 46-30. SMC Write Signals - NWE Controlled (WRITE_MODE = 1)
6438F–ATARM–21-Jun-10
SMC
SMC
SMC
SMC
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
Symbol
SMC
SMC
SMC
SMC
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Data Hold after NRD High
A25 Valid before NRD High
NCS low before NRD High
NRD Pulse Width
Parameter
VDDIOM supply
Data Setup before NCS High
Data Hold after NCS High
Data Setup before NCS High
Data Hold after NCS High
NBS0/A0, NBS1, NBS2/A1, NBS3, A2 -
A25 valid before NCS High
NRD low before NCS High
NCS Pulse Width
Write Timings
Parameter
Data Out Valid before NWE High
NWE Pulse Width
NBS0/A0 NBS1, NBS2/A1, NBS3, A2 -
A25 valid before NWE low
NCS low before NWE high
NBS0/A0, NBS1, NBS2/A1, NBS3, A2 -
HOLD or NO HOLD SETTINGS (ncs rd hold
HOLD or NO HOLD SETTINGS (nwe hold
HOLD or NO HOLD SETTINGS (nrd hold
NO HOLD SETTINGS (ncs rd hold = 0)
HOLD SETTINGS (ncs rd hold
HOLD SETTINGS (nwe hold
(ncs rd setup + ncs rd pulse - nrd
(nwe setup - ncs rd setup + nwe
ncs rd pulse length * t
(nrd setup + nrd pulse)* t
(nrd setup + nrd pulse - ncs rd
(ncs rd setup + ncs rd pulse)*
nwe pulse * t
nwe pulse * t
nwe setup * t
nrd pulse * t
setup) * t
pulse) * t
setup)* t
1.8V Supply
t
CPMCK
1.8V
15.0
11.4
15.4
CPMCK
CPMCK
CPMCK
0
0
0
CPMCK
CPMCK
CPMCK
CPMCK
- 3.7
- 3.1
- 0.8
-14.7
CPMCK
0, nwe hold = 0)
0)
0, ncs rd hold = 0)
- 2.9
- 0.7
- 0.5
- 3.3
0, nrd hold =0)
0)
CPMCK
- 0.5
Min
Min
-
(ncs rd setup + ncs rd pulse
ncs rd pulse length * t
(nwe setup - ncs rd setup +
(nrd setup + nrd pulse)*
- nrd setup)* t
(nrd setup + nrd pulse -
nwe pulse) * t
ncs rd setup) * t
nrd pulse * t
nwe pulse * t
nwe pulse * t
nwe setup * t
(ncs rd setup + ncs rd
pulse)* t
t
3.3V Supply
CPMCK
AT91SAM9G45
14.7
3.3V
14.1
10.9
- 0.2
CPMCK
0
0
0
- 15.5
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
- 4.4
- 0.2
- 3.6
- 0.3
- 4.1
- 1.1
CPMCK
- 3.4
-
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1171
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