AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 254

IC MCU ARM9 APMC 324TFBGA

AT91SAM9G45-CU-999

Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9G45-CU-999

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9G45-CU-999
Manufacturer:
Atmel
Quantity:
10 000
22.4.6
254
AT91SAM9G45
Write Protected Registers
To prevent any single software error that may corrupt DDRSDRC behavior, the registers listed
below can be write-protected by setting the WPEN bit in the DDRSDRC Write Protect Mode
Register (DDRSDRC_WPMR).
If a write access in a write-protected register is detected, then the WPVS flag in the DDRSDRC
Write Protect Status Register (DDRSDRC_WPSR) is set and the field WPVSRC indicates in
which register the write access has been attempted.
The WPVS flag is automatically reset after reading the DDRSDRC Write Protect Status Register
(DDRSDRC_WPSR).
Following is a list of the write protected registers:
“DDRSDRC Mode Register” on page 260
“DDRSDRC Refresh Timer Register” on page 261
“DDRSDRC Configuration Register” on page 262
“DDRSDRC Timing 0 Parameter Register” on page 265
“DDRSDRC Timing 1 Parameter Register” on page 267
“DDRSDRC Timing 2 Parameter Register” on page 268
“DDRSDRC Memory Device Register” on page 271
“DDRSDRC High Speed Register” on page 273
6438F–ATARM–21-Jun-10

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