AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 76
![IC MCU ARM9 APMC 324TFBGA](/photos/12/13/121367/324-tfbga-pkg_sml.jpg)
AT91SAM9G45-CU-999
Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9G45-EKES.pdf
(1218 pages)
Specifications of AT91SAM9G45-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Figure 12-6. User Reset State
12.4.4.4
76
periph_nreset
proc_nreset
(nrst_out)
RSTTYP
AT91SAM9G45
NRST
SLCK
NRST
MCK
Software Reset
When the processor reset signal is released, the RSTTYP field of the Status Register
(RSTC_SR) is loaded with the value 0x4, indicating a User Reset.
T h e
EXTERNAL_RESET_LENGTH Slow Clock cycles, as programmed in the field ERSTL. How-
ever, if NRST does not rise after EXTERNAL_RESET_LENGTH because it is driven low
externally, the internal reset lines remain asserted until NRST actually rises.
The Reset Controller offers several commands used to assert the different reset signals. These
commands are performed by writing the Control Register (RSTC_CR) with the following bits at
1:
The software reset is entered if at least one of these bits is set by the software. All these com-
mands can be performed independently or simultaneously. The software reset lasts 3 Slow
Clock cycles.
• PROCRST: Writing PROCRST at 1 resets the processor and the watchdog timer.
• PERRST: Writing PERRST at 1 resets all the embedded peripherals, including the memory
• EXTRST: Writing EXTRST at 1 asserts low the NRST pin during a time defined by the field
Resynch.
2 cycles
Any
Freq.
Any
system, and, in particular, the Remap Command. The Peripheral Reset is generally used for
debug purposes.
Except for Debug purposes, PERRST must always be used in conjunction with PROCRST
(PERRST and PROCRST set both at 1 simultaneously.)
ERSTL in the Mode Register (RSTC_MR).
N R S T
>= EXTERNAL RESET LENGTH
M a n a g e r
g u a r a n t e e s
Resynch.
2 cycles
XXX
t h a t
t h e
Processor Startup
= 3 cycles
N R S T
l i n e
0x4 = User Reset
i s
6438F–ATARM–21-Jun-10
a s s e r t e d
f o r
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