LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 136
LPC1759FBD80,551
Manufacturer Part Number
LPC1759FBD80,551
Description
IC ARM CORTEX MCU 512K 80-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.LPC1751FBD80551.pdf
(74 pages)
2.LPC1767FBD100551.pdf
(2 pages)
3.LPC1767FBD100551.pdf
(840 pages)
Specifications of LPC1759FBD80,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
80-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
52
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 6x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
52
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 6 Channel
On-chip Dac
10 bit
Package
80LQFP
Device Core
ARM Cortex M3
Family Name
LPC17xx
Maximum Speed
120 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4968
935290523551
935290523551
Available stocks
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Part Number
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Quantity
Price
Company:
Part Number:
LPC1759FBD80,551
Manufacturer:
LT
Quantity:
375
Company:
Part Number:
LPC1759FBD80,551
Manufacturer:
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Quantity:
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LPC1759FBD80,551
Manufacturer:
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NXP Semiconductors
UM10360
User manual
9.5.6.7 GPIO Interrupt Status for port 2 Rising Edge Interrupt (IO2IntStatR -
9.5.6.8 GPIO Interrupt Status for port 0 Falling Edge Interrupt (IO0IntStatF -
0x4002 80A4)
Each bit in these read-only registers indicates the rising edge interrupt status for port 2.
Table 119. GPIO Interrupt Status for port 2 Rising Edge Interrupt (IO2IntStatR - 0x4002 80A4)
[1]
0x4002 8088)
Each bit in these read-only registers indicates the falling edge interrupt status for port 0.
Table 120. GPIO Interrupt Status for port 0 Falling Edge Interrupt (IO0IntStatF - 0x4002 8088)
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
31:14 -
Bit
0
1
2
3
4
5
6
7
Not available on 80-pin package.
P2.11REI
Symbol
P2.0REI
P2.1REI
P2.2REI
P2.3REI
P2.4REI
P2.5REI
P2.6REI
P2.7REI
P2.8REI
P2.9REI
P2.10REI
P2.12REI
P2.13REI
Symbol
P0.0FEI
P0.1FEI
P0.2FEI
P0.3FEI
P0.4FEI
P0.5FEI
P0.6FEI
P0.7FEI
bit description
bit description
[1]
[1]
All information provided in this document is subject to legal disclaimers.
[1]
[1]
[1]
Value Description
0
1
Value Description
0
1
Rev. 2 — 19 August 2010
Status of Rising Edge Interrupt for P2.0
A rising edge has not been detected on P2.0.
Interrupt has been generated due to a rising edge on P2.0.
Status of Rising Edge Interrupt for P2.1.
Status of Rising Edge Interrupt for P2.2.
Status of Rising Edge Interrupt for P2.3.
Status of Rising Edge Interrupt for P2.4.
Status of Rising Edge Interrupt for P2.5.
Status of Rising Edge Interrupt for P2.6.
Status of Rising Edge Interrupt for P2.7.
Status of Rising Edge Interrupt for P2.8.
Status of Rising Edge Interrupt for P2.9.
Status of Rising Edge Interrupt for P2.10.
Status of Rising Edge Interrupt for P2.11.
Status of Rising Edge Interrupt for P2.12.
Status of Rising Edge Interrupt for P2.13.
Reserved.
Status of Falling Edge Interrupt for P0.0
A falling edge has not been detected on P0.0.
Interrupt has been generated due to a falling edge on P0.0.
Status of Falling Edge Interrupt for P0.1.
Status of Falling Edge Interrupt for P0.2.
Status of Falling Edge Interrupt for P0.3.
Status of Falling Edge Interrupt for P0.4.
Status of Falling Edge Interrupt for P0.5.
Status of Falling Edge Interrupt for P0.6.
Status of Falling Edge Interrupt for P0.7.
Chapter 9: LPC17xx General Purpose Input/Output (GPIO)
UM10360
© NXP B.V. 2010. All rights reserved.
136 of 840
Reset
value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NA
Reset
value
0
0
0
0
0
0
0
0
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