LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 492

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
21.6 Register description
Table 425. TIMER/COUNTER0-3 register map
UM10360
User manual
PC
MCR
MR0
MR1
MR2
MR3
CCR
Generic
Name
IR
TCR
TC
PR
Description
Interrupt Register. The IR can be written to clear interrupts. The IR
can be read to identify which of eight possible interrupt sources are
pending.
Timer Control Register. The TCR is used to control the Timer
Counter functions. The Timer Counter can be disabled or reset
through the TCR.
Timer Counter. The 32-bit TC is incremented every PR+1 cycles of
PCLK. The TC is controlled through the TCR.
Prescale Register. When the Prescale Counter (below) is equal to
this value, the next clock increments the TC and clears the PC.
Prescale Counter. The 32-bit PC is a counter which is incremented
to the value stored in PR. When the value in PR is reached, the TC
is incremented and the PC is cleared. The PC is observable and
controllable through the bus interface.
Match Control Register. The MCR is used to control if an interrupt is
generated and if the TC is reset when a Match occurs.
Match Register 0. MR0 can be enabled through the MCR to reset
the TC, stop both the TC and PC, and/or generate an interrupt
every time MR0 matches the TC.
Match Register 1. See MR0 description.
Match Register 2. See MR0 description.
Match Register 3. See MR0 description.
Capture Control Register. The CCR controls which edges of the
capture inputs are used to load the Capture Registers and whether
or not an interrupt is generated when a capture takes place.
Each Timer/Counter contains the registers shown in
data stored in used bits only; it does not include reserved bits content). More detailed
descriptions follow.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Access Reset
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 425
Chapter 21: LPC17xx Timer 0/1/2/3
Value
0
0
0
0
0
0
0
0
0
0
0
("Reset Value" refers to the
[1]
T0MR1 - 0x4000 401C
T0MR2 - 0x4000 4020
T0MR3 - 0x4000 4024
TIMERn Register/
Name & Address
T0IR - 0x4000 4000
T1IR - 0x4000 8000
T2IR - 0x4009 0000
T3IR - 0x4009 4000
T0TCR - 0x4000 4004
T1TCR - 0x4000 8004
T2TCR - 0x4009 0004
T3TCR - 0x4009 4004
T0TC - 0x4000 4008
T1TC - 0x4000 8008
T2TC - 0x4009 0008
T3TC - 0x4009 4008
T0PR - 0x4000 400C
T1PR - 0x4000 800C
T2PR - 0x4009 000C
T3PR - 0x4009 400C
T0PC - 0x4000 4010
T1PC - 0x4000 8010
T2PC - 0x4009 0010
T3PC - 0x4009 4010
T0MCR - 0x4000 4014
T1MCR - 0x4000 8014
T2MCR - 0x4009 0014
T3MCR - 0x4009 4014
T0MR0 - 0x4000 4018
T1MR0 - 0x4000 8018
T2MR0 - 0x4009 0018
T3MR0 - 0x4009 4018
T1MR1 - 0x4000 801C
T2MR1 - 0x4009 001C
T3MR1 - 0x4009 401C
T1MR2 - 0x4000 8020
T2MR2 - 0x4009 0020
T3MR2 - 0x4009 4020
T1MR3 - 0x4000 8024
T2MR3 - 0x4009 0024
T3MR3 - 0x4009 4024
T0CCR - 0x4000 4028
T1CCR - 0x4000 8028
T2CCR - 0x4009 0028
T3CCR - 0x4009 4028
UM10360
© NXP B.V. 2010. All rights reserved.
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