LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 174

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
UM10360
User manual
Table 178. Receive Status HashCRC Word
The StatusInfo word contains flags returned by the MAC and flags generated by the
receive data path reflecting the status of the reception.
the StatusInfo word.
Table 179. Receive status information word
Bit
8:0
15:9
24:16 DAHashCRC Hash CRC calculated from the destination address.
31:25 -
Bit
10:0
17:11 -
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Symbol
RxSize
ControlFrame
VLAN
FailFilter
Multicast
Broadcast
CRCError
SymbolError
LengthError
RangeError
AlignmentError An alignment error is flagged when dribble bits are detected and also a
Overrun
NoDescriptor
LastFlag
Error
Symbol
SAHashCRC Hash CRC calculated from the source address.
-
All information provided in this document is subject to legal disclaimers.
[1]
Description
Unused
Unused
Description
The size in bytes of the actual data transferred into one fragment buffer. In
other words, this is the size of the frame or fragment as actually written by
the DMA manager for one descriptor. This may be different from the Size
bits of the Control field in the descriptor that indicate the size of the buffer
allocated by the device driver. Size is -1 encoded e.g. if the buffer has
8 bytes the RxSize value will be 7.
Unused
Indicates this is a control frame for flow control, either a pause frame or a
frame with an unsupported opcode.
Indicates a VLAN frame.
Indicates this frame has failed the Rx filter. These frames will not normally
pass to memory. But due to the limitation of the size of the buffer, part of
this frame may already be passed to memory. Once the frame is found to
have failed the Rx filter, the remainder of the frame will be discarded
without being passed to the memory. However, if the PassRxFilter bit in
the Command register is set, the whole frame will be passed to memory.
Set when a multicast frame is received.
Set when a broadcast frame is received.
The received frame had a CRC error.
The PHY reports a bit error over the PHY interface during reception.
The frame length field value in the frame specifies a valid length, but does
not match the actual data length.
The received packet exceeds the maximum packet size.
CRC error is detected. This is in accordance with IEEE std. 802.3/clause
4.3.2.
Receive overrun. The adapter can not accept the data stream.
No new Rx descriptor is available and the frame is too long for the buffer
size in the current receive descriptor.
When set to 1, indicates this descriptor is for the last fragment of a frame.
If the frame consists of a single fragment, this bit is also set to 1.
An error occurred during reception of this frame. This is a logical OR of
AlignmentError, RangeError, LengthError, SymbolError, CRCError, and
Overrun.
Rev. 2 — 19 August 2010
Table 179
Chapter 10: LPC17xx Ethernet
lists the bit definitions in
UM10360
© NXP B.V. 2010. All rights reserved.
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