LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 633

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
UM10360
User manual
32.8.2 Copy RAM to Flash
Table 589. IAP Prepare sector(s) for write operation command
Table 590. IAP Copy RAM to Flash command
Command
Input
Return Code
Result
Description
Command
Input
Return Code
Result
Description
Prepare sector(s) for write operation
Command code: 5010
Param0: Start Sector Number
Param1: End Sector Number (should be greater than or equal to start sector
number).
CMD_SUCCESS |
BUSY |
INVALID_SECTOR
None
This command must be executed before executing "Copy RAM to Flash" or
"Erase Sector(s)" command. Successful execution of the "Copy RAM to Flash" or
"Erase Sector(s)" command causes relevant sectors to be protected again. To
prepare a single sector use the same "Start" and "End" sector numbers.
Copy RAM to Flash
Command code: 5110
Param0(DST): Destination flash address where data bytes are to be written. This
address should be a 256 byte boundary.
Param1(SRC): Source RAM address from which data bytes are to be read. This
address should be a word boundary.
Param2: Number of bytes to be written. Should be 256 | 512 | 1024 | 4096.
Param3: CPU Clock Frequency (CCLK) in kHz.
CMD_SUCCESS |
SRC_ADDR_ERROR (Address not a word boundary) |
DST_ADDR_ERROR (Address not on correct boundary) |
SRC_ADDR_NOT_MAPPED |
DST_ADDR_NOT_MAPPED |
COUNT_ERROR (Byte count is not 256 | 512 | 1024 | 4096) |
SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION |
BUSY |
None
This command is used to program the flash memory. The affected sectors should
be prepared first by calling "Prepare Sector for Write Operation" command. The
affected sectors are automatically protected again once the copy command is
successfully executed.
All information provided in this document is subject to legal disclaimers.
Chapter 32: LPC17xx Flash memory interface and programming
Rev. 2 — 19 August 2010
UM10360
© NXP B.V. 2010. All rights reserved.
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