LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 244

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
11.12 Serial interface engine command description
UM10360
User manual
The functions and registers of the Serial Interface Engine (SIE) are accessed using
commands, which consist of a command code followed by optional data bytes (read or
write action). The USBCmdCode
used for these accesses.
A complete access consists of two phases:
An overview of the available commands is given in
Here is an example of the Read Current Frame Number command (reading 2 bytes):
USBDevIntClr = 0x30;
USBCmdCode = 0x00F50500;
while (!(USBDevIntSt & 0x10)); // Wait for CCEMPTY.
USBDevIntClr = 0x10;
USBCmdCode = 0x00F50200;
while (!(USBDevIntSt & 0x20)); // Wait for CDFULL.
USBDevIntClr = 0x20;
CurFrameNum = USBCmdData;
USBCmdCode = 0x00F50200;
while (!(USBDevIntSt & 0x20)); // Wait for CDFULL.
Temp = USBCmdData;
USBDevIntClr = 0x20;
CurFrameNum = CurFrameNum | (Temp << 8);
Here is an example of the Set Address command (writing 1 byte):
USBDevIntClr = 0x10;
USBCmdCode = 0x00D00500;
while (!(USBDevIntSt & 0x10)); // Wait for CCEMPTY.
USBDevIntClr = 0x10;
USBCmdCode = 0x008A0100;
while (!(USBDevIntSt & 0x10)); // Wait for CCEMPTY.
USBDevIntClr = 0x10;
1. Command phase: the USBCmdCode register is written with the CMD_PHASE field
2. Data phase (optional): for writes, the USBCmdCode register is written with the
set to the value 0x05 (Command), and the CMD_CODE field set to the desired
command code. On completion of the command, the CCEMPTY bit of USBDevIntSt is
set.
CMD_PHASE field set to the value 0x01 (Write), and the CMD_WDATA field set with
the desired write data. On completion of the write, the CCEMPTY bit of USBDevIntSt
is set. For reads, USBCmdCode register is written with the CMD_PHASE field set to
the value 0x02 (Read), and the CMD_CODE field set with command code the read
corresponds to. On completion of the read, the CDFULL bit of USBDevInSt will be set,
indicating the data is available for reading in the USBCmdData register. In the case of
multi-byte registers, the least significant byte is accessed first.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
// Clear both CCEMPTY & CDFULL
// CMD_CODE=0xF5, CMD_PHASE=0x05(Command)
// Clear CCEMPTY interrupt bit.
// CMD_CODE=0xF5, CMD_PHASE=0x02(Read)
// Clear CDFULL.
// Read Frame number LSB byte.
// CMD_CODE=0xF5, CMD_PHASE=0x02(Read)
// Read Frame number MSB byte
// Clear CDFULL interrupt bit.
// Clear CCEMPTY.
// CMD_CODE=0xD0, CMD_PHASE=0x05(Command)
// Clear CCEMPTY.
// CMD_WDATA=0x8A(DEV_EN=1, DEV_ADDR=0xA),
// CMD_PHASE=0x01(Write)
// Clear CCEMPTY.
(Table
220) and USBCmdData
Chapter 11: LPC17xx USB device controller
Table
241.
(Table
UM10360
© NXP B.V. 2010. All rights reserved.
221) registers are
244 of 840