MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1057

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

HW_DCP_CH3OPTS_CLR: 0x1F8
HW_DCP_CH3OPTS_TOG: 0x1FC
The options register can be used to control optional features of the channels.
Address:
Re-
13.3.32 DCP Debug Select Register (HW_DCP_DBGSELECT)
This register selects a debug register to view.
This register selects debug information to return in the debug data register.
Address:
Re-
Freescale Semiconductor, Inc.
set
set
Bit
Bit
W
W
R
R
RECOVERY_
31
31
0
0
TIMER
INDEX
31 16
RSVD
RSVD
Field
15 0
Field
31 8
7 0
30
30
0
0
29
29
0
0
HW_DCP_CH3OPTS
HW_DCP_DBGSELECT
28
28
0
0
Reserved, always set to zero.
This field indicates the recovery time for the channel. After each operation, the recover timer for the channel
is initiallized with this value and then decremented until the timer reaches zero. The channel will not initiate
operation on the next packet in the chain until the recovery time has been satisfied. The timebase for the
recovery timer is 16 HCLK clock cycles, providing a range of 0ns to 8.3ms at 133 MHz operation.
Reserved, always set to zero.
Selects a value to read through the debug data register.
0x01
0x10
0x11
0x12
27
27
0
0
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
CONTROL —
OTPKEY0 —
OTPKEY1 —
OTPKEY2 —
25
25
0
0
RSVD
24
24
0
0
HW_DCP_DBGSELECT field descriptions
23
23
0
0
HW_DCP_CH3OPTS field descriptions
22
22
8002_8000h base + 1F0h offset = 8002_81F0h
0
0
8002_8000h base + 400h offset = 8002_8400h
21
21
0
0
RSVD
20
20
0
0
19
19
0
0
18
18
0
0
17
17
0
0
16
16
0
0
15
15
0
0
Description
Description
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
10
10
RECOVERY_TIMER
0
0
Chapter 13 Data Co-Processor (DCP)
0
0
9
9
0
0
8
8
0
0
7
7
0
0
6
6
0
0
5
5
INDEX
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
1057
0
0
0
0