MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 63

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Section Number
Freescale Semiconductor, Inc.
27.5
28.1
28.2
28.3
28.4
Programmable Registers.............................................................................................................................................1752
Pulse Width Modulator (PWM) Overview.................................................................................................................1775
Operation....................................................................................................................................................................1775
Behavior During Reset................................................................................................................................................1781
Programmable Registers.............................................................................................................................................1781
27.5.1
27.5.2
27.5.3
27.5.4
27.5.5
27.5.6
27.5.7
27.5.8
27.5.9
27.5.10
27.5.11
27.5.12
27.5.13
27.5.14
28.2.1
28.2.2
28.2.3
28.2.4
28.2.5
28.4.1
28.4.2
28.4.3
I2C Control Register 0 (HW_I2CCTRL0)..............................................................................................1753
I2C Timing Register 0 (HW_I2CTIMING0)...........................................................................................1755
I2C Timing Register 1 (HW_I2CTIMING1)...........................................................................................1756
I2C Timing Register 2 (HW_I2CTIMING2)...........................................................................................1757
I2C Control Register 1 (HW_I2CCTRL1)..............................................................................................1758
I2C Status Register (HW_I2CSTAT).......................................................................................................1761
I2C Queue control reg. (HW_I2CQUEUECTRL)..................................................................................1764
I2C Queue Status Register. (HW_I2CQUEUESTAT).............................................................................1766
I2C Queue command reg (HW_I2CQUEUECMD)................................................................................1767
I2C Controller Read Data Register for queue mode only. (HW_I2CQUEUEDATA).............................1769
I2C Controller DMA Read and Write Data Register (HW_I2CDATA)..................................................1770
I2C Device Debug Register 0 (HW_I2CDEBUG0)................................................................................1770
I2C Device Debug Register 1 (HW_I2CDEBUG1)................................................................................1772
I2C Version Register (HW_I2CVERSION)............................................................................................1774
XTAL OSC Driving Mode......................................................................................................................1778
HSADC Driving Mode............................................................................................................................1779
Multi-Chip Attachment Mode.................................................................................................................1780
Channel 2 Analog Enable Function.........................................................................................................1781
Channel Output Cutoff Using Module Clock Gate.................................................................................1781
PWM Control and Status Register (HW_PWMCTRL)..........................................................................1782
PWM Channel 0 Active Register (HW_PWMACTIVE0)......................................................................1784
PWM Channel 0 Period Register (HW_PWMPERIOD0)......................................................................1785
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Pulse-Width Modulator (PWM) Controller
Chapter 28
Title
Page
63

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