MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2244

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Operation
37.3.2 Sample Data Bits Left Shift
The original output of the analog ADC block is 12-bit data. When using 8-bit mode or 10-bit
mode, the user can configure the ADC_SAMPLE_SHIFT_BITS_NUM in HSADC Control
Register 0 to determine the number of bits required to be left-shifted out. So, the user can
choose any 8 bit or 10 bit consequential sample data to be stored into the external memory.
Note that when in 8-bit mode, the number of left-shifted bits can be from zero to four while
in 10-bit mode, the number can only be from zero to two. This feature can be useful to cover
all the amplitude range of the analog input source.
2244
Operation Clock
ADC Data [11:0]
ADC Data Valid
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Operation Clock
ADC Enable
PWM Trigger
ADC Enable
AHB Clock
Bit 11
Figure 37-4. Timing of analog ADC interface
Figure 37-5. Left Shift Bits of Sample Data
Figure 37-3. Timing of PWM Trigger Mode
Bit 10
Bit 9
Bit 9
Bit 8
Bit 8
Bit 7
Bit 7
Bit 6
ADC sample data
10 bits FIFO data
Bit 6
Bit 5
8 bits FIFO data
Bit 5
Bit 4
Bit 4
Bit 3
Bit 3
Bit 2
Bit 2
Bit 1
Bit 1
Bit 0
D
Bit 0
Left shift
Freescale Semiconductor, Inc.
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