MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2252

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Programmable Registers
37.5.2 HSADC Control Register 1 (HW_HSADC_CTRL1)
The HSADC Control Register 1 specifies interrupt status.
HW_HSADC_CTRL1: 0x010
HW_HSADC_CTRL1_SET: 0x014
HW_HSADC_CTRL1_CLR: 0x018
HW_HSADC_CTRL1_TOG: 0x01C
This register specifies interrupt status of HSADC.
EXAMPLE
Address:
2252
Reset
DELAY_CYCLES
HSADC_RUN
TRIGGER_
PRESENT
Bit
W
RSRVD0
HSADC_
R
HW_HSADC_CTRL1_WR(0x0000001f);
Field
11 7
5 1
6
0
31
1
HW_HSADC_CTRL1
30
1
Reserved.
This read-only bit returns 1 when the HSADC function block is present on the chip.
Set the cycles between the triggers happen and the ADC starts the conversion.Take effect when hsadc_run
is asserted.
When set to 1'b1,the HSADC loads the parameters in the registers and starts to run.
29
1
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_HSADC_CTRL0 field descriptions (continued)
28
1
8000_2000h base + 10h offset = 8000_2010h
27
0
26
0
25
0
24
0
Description
23
0
22
0
RSRVD1[25:16]
21
0
20
0
Freescale Semiconductor, Inc.
19
0
18
0
17
0
16
0

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