MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 869

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
10.8.10 Synchronous Serial Port0 Clock Control Register
This register controls the clock divider that generates the clock for the synchronous serial
port (SSP0), CLK_SSP0. Note: Do not write register space when busy bit(s) are high.
EXAMPLE
HW_CLKCTRL_SSP0_WR(BF_CLKCTRL_SSP0_DIV(40));
Address:
Freescale Semiconductor, Inc.
Reset
PWM_CLK24M_
CLK32K_GATE
UART_CLK_
DIV_UART
Bit
TIMROT_
W
RSRVD3
RSRVD2
RSRVD1
R
28 27
GATE
GATE
Field
25 2
1 0
31
30
29
26
31
1
HW_CLKCTRL_SSP0
(HW_CLKCTRL_SSP0)
30
0
If set to 1, fixed 24-MHz clock for the UART, CLK_UART, is gated off.
Always set to zero (0).
If set to 1, fixed 24-MHz clock for the PWM, CLK_PWM24M, is gated off.
Always set to zero (0).
If set to 1, fixed 32-kHz clock for the TIMROT block, CLK_32K, is gated off.
Always set to zero (0).
Reserved - Always set to one (1)
BUSY
29
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
0
HW_CLKCTRL_XTAL field descriptions
8004_0000h base + 90h offset = 8004_0090h
27
0
26
0
25
0
24
0
Description
Chapter 10 Clock Generation and Control (CLKCTRL)
23
RSRVD1[28:16]
0
22
0
21
0
20
0
19
0
18
0
17
0
16
0
869

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